Clean up FastSimulation's handling of slice (s) LogicNets for ~15% speedup.#494
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fdxmw wants to merge 1 commit into
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Clean up FastSimulation's handling of slice (s) LogicNets for ~15% speedup.#494fdxmw wants to merge 1 commit into
FastSimulation's handling of slice (s) LogicNets for ~15% speedup.#494fdxmw wants to merge 1 commit into
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…15% speedup. The previous implementation often generates slice code with unnecessary shifts and bitmasks. Slices are very common, so avoiding these unnecessary operations results in noticeably faster FastSimulation steps, using PyrtlNet as a benchmark. This also cleans up some string formatting code, replacing slower string concatenations with faster f-strings. This results in a ~10% speedup for instantiating FastSimulation for PyrtlNet. Add some type annotations.
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The previous implementation often generates slice code with unnecessary shifts and bitmasks. Slices are very common, so avoiding these unnecessary operations results in noticeably faster FastSimulation steps, using PyrtlNet as a benchmark.
This also cleans up some string formatting code, replacing slower string concatenations with faster f-strings. This results in a ~10% speedup for instantiating FastSimulation for PyrtlNet.
Add some type annotations.