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Apply ConsecutiveSlice optimizations to CompiledSimulation for ~46% reduction in compile time. Run Python tests #260: Pull request #495 synchronize by fdxmw
50s fdxmw:compilesim
fdxmw:compilesim
50s
Remove unnecessary slice (s) LogicNets from sign_extended and zero_extended. Run Python tests #259: Pull request #496 synchronize by fdxmw
57s fdxmw:extend
fdxmw:extend
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Remove unnecessary slice (s) LogicNets from sign_extended and zero_extended. Run Python tests #258: Pull request #496 synchronize by fdxmw
56s fdxmw:extend
fdxmw:extend
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Apply ConsecutiveSlice optimizations to CompiledSimulation for ~46% reduction in compile time. Run Python tests #257: Pull request #495 synchronize by fdxmw
52s fdxmw:compilesim
fdxmw:compilesim
52s
Remove unnecessary slice (s) LogicNets from sign_extended and zero_extended. Run Python tests #256: Pull request #496 synchronize by fdxmw
1m 3s fdxmw:extend
fdxmw:extend
1m 3s
Remove unnecessary slice (s) LogicNets from sign_extended and zero_extended. Run Python tests #255: Pull request #496 synchronize by fdxmw
1m 2s fdxmw:extend
fdxmw:extend
1m 2s
Remove unnecessary slice (s) LogicNets from sign_extended and zero_extended. Run Python tests #254: Pull request #496 opened by fdxmw
57s fdxmw:extend
fdxmw:extend
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Apply ConsecutiveSlice optimizations to CompiledSimulation for ~46% reduction in compile time. Run Python tests #253: Pull request #495 synchronize by fdxmw
59s fdxmw:compilesim
fdxmw:compilesim
59s
Apply ConsecutiveSlice optimizations to CompiledSimulation for ~46% reduction in compile time. Run Python tests #252: Pull request #495 opened by fdxmw
51s fdxmw:compilesim
fdxmw:compilesim
51s
Clean up FastSimulation's handling of slice (s) LogicNets for ~… Run Python tests #251: Commit 1c9ce1f pushed by fdxmw
1m 3s development
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1m 3s
Clean up FastSimulation's handling of slice (s) LogicNets for ~… Build and publish release #109: Commit 1c9ce1f pushed by fdxmw
17s development
development
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Clean up FastSimulation's handling of slice (s) LogicNets for ~15% speedup. Run Python tests #250: Pull request #494 synchronize by fdxmw
48s fdxmw:sim
fdxmw:sim
48s
Clean up FastSimulation's handling of slice (s) LogicNets for ~15% speedup. Run Python tests #249: Pull request #494 opened by fdxmw
49s fdxmw:sim
fdxmw:sim
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Speed up Simulation by moving the declaration of the simple_func di… Run Python tests #248: Commit d3eee38 pushed by fdxmw
54s development
development
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Speed up Simulation by moving the declaration of the simple_func di… Build and publish release #108: Commit d3eee38 pushed by fdxmw
12s development
development
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Speed up Simulation by moving the declaration of the simple_func dict out of _execute Run Python tests #247: Pull request #493 opened by fdxmw
1m 8s fdxmw:sim
fdxmw:sim
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name_scope is a context manager that prepends prefixes to WireVector and MemBlock names Run Python tests #246: Pull request #492 opened by fdxmw
53s fdxmw:names
fdxmw:names
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Update robots.txt to allow indexing https://pyrtl.readthedocs.io/ Build and publish release #107: Commit 0dbbbc6 pushed by fdxmw
12s development
development
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Update robots.txt to allow indexing https://pyrtl.readthedocs.io/ Run Python tests #245: Commit 0dbbbc6 pushed by fdxmw
50s development
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Deploy GitHub pages from GitHub actions with Sphinx Run Python tests #244: Pull request #489 synchronize by fdxmw
57s fdxmw:pages
fdxmw:pages
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Deploy GitHub pages from GitHub actions with Sphinx Run Python tests #243: Pull request #489 synchronize by fdxmw
55s fdxmw:pages
fdxmw:pages
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rtllib documentation cleanup (#491) Build and publish release #106: Commit 0139256 pushed by fdxmw
13s development
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rtllib documentation cleanup (#491) Run Python tests #242: Commit 0139256 pushed by fdxmw
1m 2s development
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Graph Update: uv in /. #1440396810 Dependency Graph #2: by dependabot Bot
34s development
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rtllib documentation cleanup Run Python tests #241: Pull request #491 synchronize by fdxmw
56s fdxmw:trace
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