Add Verilator-based verification environment for hwpe_ctrl_target

[FrancescoConti]

Introduce a dedicated, self-checking test environment for the SystemRDL-based
hwpe_ctrl_target, together with a GitHub Actions CI that runs it. The build and
regression infrastructure mirrors RedMulE's (bender script -> verilator --binary,
bwruntests.py parallel runner, portless *_tb_wrap top).

The testbench drives hwpe_ctrl_intf_periph directly (no core, no golden model),
which allows cycle-exact stimulus for the backpressure and commit/trigger-overlap
corners. Four scenarios, selected with +TEST=:

reg_access every register at its offset: reset values, write/readback,
read-only immutability, reserved-bit masking, byte enables,
and the hardware-to-software paths (STATUS, RUNNING_JOB)
offload repeated ACQUIRE -> COMMIT -> TRIGGER, overlapped and
separated, job-ID sequencing, job FIFO payload ordering,
autotrigger on/off, trigger masking while a job runs
fifo_backpressure job queue filled to NB_CONTEXT, ACQUIRE returning the
queue-full code while gnt stays asserted, then recovery
soft_clear all four encodings, clear_o pulse width, register-file
versus state clear isolation, and reuse after a clear

Other changes:

• rdl.sh: replace the GNU-only sed -i (broken on macOS) with a portable form,
  and prepend the SPDX header PeakRDL does not emit
• Bender.yml: sources are guarded by a project-specific hwpe_ctrl_test target;
  the generic 'test' target would also select common_cells' own testbenches,
  since bender applies target flags across the whole dependency tree
• CI matrix covers NB_CONTEXT 2 and 4, an elaboration-time parameter