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ixgbe: convert Rx to libeth and page_pool #6
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base: ixgbevf-xdp-public
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -33,6 +33,8 @@ | |
| #include "ixgbe_ipsec.h" | ||
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| #include <net/xdp.h> | ||
| #include <net/libeth/rx.h> | ||
| #include <net/libeth/types.h> | ||
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| /* common prefix used by pr_<> macros */ | ||
| #undef pr_fmt | ||
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@@ -69,73 +71,16 @@ | |
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| /* Supported Rx Buffer Sizes */ | ||
| #define IXGBE_RXBUFFER_256 256 /* Used for skb receive header */ | ||
| #define IXGBE_RXBUFFER_1536 1536 | ||
| #define IXGBE_RXBUFFER_2K 2048 | ||
| #define IXGBE_RXBUFFER_3K 3072 | ||
| #define IXGBE_RXBUFFER_4K 4096 | ||
| #define IXGBE_MAX_RXBUFFER 16384 /* largest size for a single descriptor */ | ||
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| #define IXGBE_PKT_HDR_PAD (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2)) | ||
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| /* Attempt to maximize the headroom available for incoming frames. We | ||
| * use a 2K buffer for receives and need 1536/1534 to store the data for | ||
| * the frame. This leaves us with 512 bytes of room. From that we need | ||
| * to deduct the space needed for the shared info and the padding needed | ||
| * to IP align the frame. | ||
| * | ||
| * Note: For cache line sizes 256 or larger this value is going to end | ||
| * up negative. In these cases we should fall back to the 3K | ||
| * buffers. | ||
| */ | ||
| #if (PAGE_SIZE < 8192) | ||
| #define IXGBE_MAX_2K_FRAME_BUILD_SKB (IXGBE_RXBUFFER_1536 - NET_IP_ALIGN) | ||
| #define IXGBE_2K_TOO_SMALL_WITH_PADDING \ | ||
| ((NET_SKB_PAD + IXGBE_RXBUFFER_1536) > SKB_WITH_OVERHEAD(IXGBE_RXBUFFER_2K)) | ||
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| static inline int ixgbe_compute_pad(int rx_buf_len) | ||
| { | ||
| int page_size, pad_size; | ||
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| page_size = ALIGN(rx_buf_len, PAGE_SIZE / 2); | ||
| pad_size = SKB_WITH_OVERHEAD(page_size) - rx_buf_len; | ||
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| return pad_size; | ||
| } | ||
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| static inline int ixgbe_skb_pad(void) | ||
| { | ||
| int rx_buf_len; | ||
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| /* If a 2K buffer cannot handle a standard Ethernet frame then | ||
| * optimize padding for a 3K buffer instead of a 1.5K buffer. | ||
| * | ||
| * For a 3K buffer we need to add enough padding to allow for | ||
| * tailroom due to NET_IP_ALIGN possibly shifting us out of | ||
| * cache-line alignment. | ||
| */ | ||
| if (IXGBE_2K_TOO_SMALL_WITH_PADDING) | ||
| rx_buf_len = IXGBE_RXBUFFER_3K + SKB_DATA_ALIGN(NET_IP_ALIGN); | ||
| else | ||
| rx_buf_len = IXGBE_RXBUFFER_1536; | ||
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| /* if needed make room for NET_IP_ALIGN */ | ||
| rx_buf_len -= NET_IP_ALIGN; | ||
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| return ixgbe_compute_pad(rx_buf_len); | ||
| } | ||
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| #define IXGBE_SKB_PAD ixgbe_skb_pad() | ||
| #else | ||
| #define IXGBE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN) | ||
| #endif | ||
| #define IXGBE_RX_PAGE_LEN(hr) (ALIGN_DOWN(LIBETH_RX_PAGE_LEN(hr), \ | ||
| IXGBE_SRRCTL_BSIZEPKT_STEP)) | ||
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| /* | ||
| * NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we | ||
| * reserve 64 more, and skb_shared_info adds an additional 320 bytes more, | ||
| * this adds up to 448 bytes of extra data. | ||
| * | ||
| * Since netdev_alloc_skb now allocates a page fragment we can use a value | ||
| * of 256 and the resultant skb will have a truesize of 960 or less. | ||
| * RX header buffer size for page-based allocation using napi_build_skb. | ||
| * Allows efficient header/data split without excessive overhead. | ||
| */ | ||
| #define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256 | ||
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@@ -271,20 +216,9 @@ struct ixgbe_tx_buffer { | |
| u32 tx_flags; | ||
| }; | ||
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| struct ixgbe_rx_buffer { | ||
| union { | ||
| struct { | ||
| struct sk_buff *skb; | ||
| dma_addr_t dma; | ||
| struct page *page; | ||
| __u32 page_offset; | ||
| __u16 pagecnt_bias; | ||
| }; | ||
| struct { | ||
| bool discard; | ||
| struct xdp_buff *xdp; | ||
| }; | ||
| }; | ||
| struct ixgbe_xsk_rx_buffer { | ||
| bool discard; | ||
| struct xdp_buff *xdp; | ||
| }; | ||
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| struct ixgbe_queue_stats { | ||
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@@ -311,8 +245,6 @@ struct ixgbe_rx_queue_stats { | |
| #define IXGBE_TS_HDR_LEN 8 | ||
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| enum ixgbe_ring_state_t { | ||
| __IXGBE_RX_3K_BUFFER, | ||
| __IXGBE_RX_BUILD_SKB_ENABLED, | ||
| __IXGBE_RX_RSC_ENABLED, | ||
| __IXGBE_RX_CSUM_UDP_ZERO_ERR, | ||
| __IXGBE_RX_FCOE, | ||
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@@ -324,9 +256,6 @@ enum ixgbe_ring_state_t { | |
| __IXGBE_TX_DISABLED, | ||
| }; | ||
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| #define ring_uses_build_skb(ring) \ | ||
| test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state) | ||
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| struct ixgbe_fwd_adapter { | ||
| unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; | ||
| struct net_device *netdev; | ||
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@@ -357,17 +286,22 @@ struct ixgbe_ring { | |
| struct ixgbe_ring *next; /* pointer to next ring in q_vector */ | ||
| struct ixgbe_q_vector *q_vector; /* backpointer to host q_vector */ | ||
| struct net_device *netdev; /* netdev ring belongs to */ | ||
| struct bpf_prog *xdp_prog; | ||
| struct device *dev; /* device for DMA mapping */ | ||
| struct bpf_prog __rcu *xdp_prog; | ||
|
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| union { | ||
| struct page_pool *pp; /* Rx ring */ | ||
| struct device *dev; /* Tx ring */ | ||
| }; | ||
| void *desc; /* descriptor ring memory */ | ||
| union { | ||
| struct libeth_fqe *rx_fqes; | ||
| struct ixgbe_xsk_rx_buffer *rx_xsk_buffer_info; | ||
| struct ixgbe_tx_buffer *tx_buffer_info; | ||
| struct ixgbe_rx_buffer *rx_buffer_info; | ||
| }; | ||
|
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| unsigned long state; | ||
| u8 __iomem *tail; | ||
| dma_addr_t dma; /* phys. address of descriptor ring */ | ||
| unsigned int size; /* length in bytes */ | ||
| u32 truesize; | ||
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| u16 count; /* amount of descriptors */ | ||
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@@ -382,12 +316,9 @@ struct ixgbe_ring { | |
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| unsigned long last_rx_timestamp; | ||
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| union { | ||
| u16 next_to_alloc; | ||
| struct { | ||
| u8 atr_sample_rate; | ||
| u8 atr_count; | ||
| }; | ||
| struct { | ||
| u8 atr_sample_rate; | ||
| u8 atr_count; | ||
| }; | ||
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| u8 dcb_tc; | ||
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@@ -397,12 +328,12 @@ struct ixgbe_ring { | |
| struct ixgbe_tx_queue_stats tx_stats; | ||
| struct ixgbe_rx_queue_stats rx_stats; | ||
| }; | ||
| u16 rx_offset; | ||
| struct xdp_rxq_info xdp_rxq; | ||
| spinlock_t tx_lock; /* used in XDP mode */ | ||
| struct xsk_buff_pool *xsk_pool; | ||
| u16 ring_idx; /* {rx,tx,xdp}_ring back reference idx */ | ||
| u16 rx_buf_len; | ||
| u32 rx_buf_len; | ||
| struct libeth_xdp_buff_stash xdp_stash; | ||
| } ____cacheline_internodealigned_in_smp; | ||
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| enum ixgbe_ring_f_enum { | ||
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@@ -446,31 +377,6 @@ struct ixgbe_ring_feature { | |
| #define IXGBE_82599_VMDQ_4Q_MASK 0x7C | ||
| #define IXGBE_82599_VMDQ_2Q_MASK 0x7E | ||
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| /* | ||
| * FCoE requires that all Rx buffers be over 2200 bytes in length. Since | ||
| * this is twice the size of a half page we need to double the page order | ||
| * for FCoE enabled Rx queues. | ||
| */ | ||
| static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring) | ||
|
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| { | ||
| if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) | ||
| return IXGBE_RXBUFFER_3K; | ||
| #if (PAGE_SIZE < 8192) | ||
| if (ring_uses_build_skb(ring)) | ||
| return IXGBE_MAX_2K_FRAME_BUILD_SKB; | ||
| #endif | ||
| return IXGBE_RXBUFFER_2K; | ||
| } | ||
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| static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring) | ||
| { | ||
| #if (PAGE_SIZE < 8192) | ||
| if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) | ||
| return 1; | ||
| #endif | ||
| return 0; | ||
| } | ||
| #define ixgbe_rx_pg_size(_ring) (PAGE_SIZE << ixgbe_rx_pg_order(_ring)) | ||
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|
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||
| #define IXGBE_ITR_ADAPTIVE_MIN_INC 2 | ||
| #define IXGBE_ITR_ADAPTIVE_MIN_USECS 10 | ||
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@@ -672,7 +578,7 @@ struct ixgbe_adapter { | |
| #define IXGBE_FLAG2_VLAN_PROMISC BIT(13) | ||
| #define IXGBE_FLAG2_EEE_CAPABLE BIT(14) | ||
| #define IXGBE_FLAG2_EEE_ENABLED BIT(15) | ||
| #define IXGBE_FLAG2_RX_LEGACY BIT(16) | ||
| /* BIT16 used to be reserved for legacy RX flag */ | ||
| #define IXGBE_FLAG2_IPSEC_ENABLED BIT(17) | ||
| #define IXGBE_FLAG2_VF_IPSEC_ENABLED BIT(18) | ||
| #define IXGBE_FLAG2_AUTO_DISABLE_VF BIT(19) | ||
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@@ -919,7 +825,6 @@ struct ixgbe_cb { | |
| }; | ||
| dma_addr_t dma; | ||
| u16 append_cnt; | ||
| bool page_released; | ||
| }; | ||
| #define IXGBE_CB(skb) ((struct ixgbe_cb *)(skb)->cb) | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -132,11 +132,9 @@ static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { | |
| #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN | ||
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| static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { | ||
| #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) | ||
| "legacy-rx", | ||
| #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) | ||
| #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(0) | ||
| "vf-ipsec", | ||
| #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) | ||
| #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(1) | ||
| "mdd-disable-vf", | ||
| }; | ||
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@@ -1951,7 +1949,6 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) | |
| /* Setup Rx Descriptor ring and Rx buffers */ | ||
| rx_ring->count = IXGBE_DEFAULT_RXD; | ||
| rx_ring->queue_index = 0; | ||
| rx_ring->dev = &adapter->pdev->dev; | ||
|
Owner
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||
| rx_ring->netdev = adapter->netdev; | ||
| rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; | ||
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@@ -1963,6 +1960,10 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) | |
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| hw->mac.ops.disable_rx(hw); | ||
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| clear_ring_rsc_enabled(rx_ring); | ||
| if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) | ||
| set_ring_rsc_enabled(rx_ring); | ||
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| ixgbe_configure_rx_ring(adapter, rx_ring); | ||
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| rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); | ||
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@@ -2058,14 +2059,16 @@ static void ixgbe_create_lbtest_frame(struct sk_buff *skb, | |
| skb->data[frame_size + 12] = 0xAF; | ||
| } | ||
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| static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, | ||
| static bool ixgbe_check_lbtest_frame(const struct libeth_fqe *rx_buffer, | ||
| unsigned int frame_size) | ||
| { | ||
| u32 hr = netmem_get_pp(rx_buffer->netmem)->p.offset; | ||
| unsigned char *data; | ||
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| frame_size >>= 1; | ||
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| data = page_address(rx_buffer->page) + rx_buffer->page_offset; | ||
| data = page_address(__netmem_to_page(rx_buffer->netmem)) + | ||
| rx_buffer->offset + hr; | ||
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| return data[3] == 0xFF && data[frame_size + 10] == 0xBE && | ||
| data[frame_size + 12] == 0xAF; | ||
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@@ -2113,28 +2116,22 @@ static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, | |
| } | ||
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| while (rx_desc->wb.upper.length) { | ||
| struct ixgbe_rx_buffer *rx_buffer; | ||
| struct libeth_fqe *rx_buffer; | ||
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| /* check Rx buffer */ | ||
| rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; | ||
| rx_buffer = &rx_ring->rx_fqes[rx_ntc]; | ||
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| /* sync Rx buffer for CPU read */ | ||
| dma_sync_single_for_cpu(rx_ring->dev, | ||
| rx_buffer->dma, | ||
| ixgbe_rx_bufsz(rx_ring), | ||
| DMA_FROM_DEVICE); | ||
| libeth_rx_sync_for_cpu(rx_buffer, rx_ring->rx_buf_len); | ||
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| /* verify contents of skb */ | ||
| if (ixgbe_check_lbtest_frame(rx_buffer, size)) | ||
| count++; | ||
| else | ||
| break; | ||
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| /* sync Rx buffer for device write */ | ||
| dma_sync_single_for_device(rx_ring->dev, | ||
| rx_buffer->dma, | ||
| ixgbe_rx_bufsz(rx_ring), | ||
| DMA_FROM_DEVICE); | ||
| /* recycle the page back to the pool */ | ||
| libeth_rx_recycle_slow(rx_buffer->netmem); | ||
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| /* increment Rx next to clean counter */ | ||
| rx_ntc++; | ||
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@@ -3667,9 +3664,6 @@ static u32 ixgbe_get_priv_flags(struct net_device *netdev) | |
| struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); | ||
| u32 priv_flags = 0; | ||
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| if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) | ||
| priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; | ||
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| if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) | ||
| priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; | ||
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@@ -3685,10 +3679,6 @@ static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) | |
| unsigned int flags2 = adapter->flags2; | ||
| unsigned int i; | ||
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| flags2 &= ~IXGBE_FLAG2_RX_LEGACY; | ||
| if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) | ||
| flags2 |= IXGBE_FLAG2_RX_LEGACY; | ||
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| flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; | ||
| if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) | ||
| flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; | ||
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This updated comment does not make much sense to me. You can probably get rid of
ixgbe_pull_tail()in this patch, because it does not make much sense withbuild_skb. This way this define can just serve as just a default HW header buffer size.