Fix FPU x0 writeback scoreboard

[cassuto]

Issue

Fixes scoreboard invalid writeback register RTL assertion triggered by FPU compare instructions writing to integer x0, for example:

feq.s x0, f24, f1

It reports:

9503: *** cluster0-socket0-core0-issue0-scoreboard invalid writeback register: wid=0, PC=0x......., tmask=1110, rd=0 (#126)
- hw/rtl/core/VX_scoreboard.sv:243: Verilog $finish

Root Cause

FPU results always asserted wb, including compare instructions whose destination is integer x0.
The decoder correctly encodes this destination as make_reg_num(REG_TYPE_I, 0), but scoreboard does not reserve x0.
When the FPU later reported a writeback for x0, RTL hit the invalid writeback assertion.

Unless users write (inlined) assembly code, compilers usually do not generate feq.s x0, ..., this is not a compiler bug.