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Chiisai HAL Specification

An open, royalty-free standard for the Hardware Abstraction Layer (HAL) of small, resource-constrained microcontrollers used in cost-sensitive sensors, actuators, and other compact embedded systems.

This repository publishes the rendered specification as a browsable HTML site.

Viewing the specification

  • Online (rendered documentation): chiisai-hal-specification.github.io
  • Offline: download or clone this repository and open index.html in a web browser. All pages, search, diagrams, and cross‑links work from the local files — no server or build step required.

What the Chiisai HAL is

The Chiisai HAL abstracts hardware‑dependent functionality — especially communication peripherals — so that middleware and application code run across different MCU platforms without tight hardware coupling or restrictive licensing. Each driver encapsulates hardware‑specific access behind a hardware‑independent API and configuration, giving upper layers a unified interface for the core functionality while staying flexible enough to expose platform‑specific features.

Across modules, a Chiisai HAL driver typically provides:

  • initialisation and de‑initialisation of the underlying hardware;
  • configuration of module‑ and channel‑specific parameters;
  • data I/O relevant to the hardware domain (transmit/receive, pin control, memory read/write/erase/blank‑check, …);
  • status reporting, error indication, and optional notification (event or polling).

Who it is for

  • Silicon vendors implementing a conformant driver (primary audience for the normative parts).
  • Application developers consuming a driver (primary audience for the guides).

Scope

The specification covers only the hardware elements commonly required by middleware layers, which keeps the standard small while remaining extensible:

Module Domain
Can CAN controller interface
Lin LIN interface
Spi SPI (controller / target)
I2c I²C (controller / target)
Uart UART / serial
Mcu MCU clock, reset, core services
Mem Memory (read / write / erase / blank‑check)
Port GPIO / pin configuration
Wdg Watchdog

License

This project is licensed under the Apache License 2.0. See LICENSE file for details.

Contact Information

The Chiisai HAL Specification is maintained by the Chiisai project contributors.

For questions, feedback, bug reports, or proposals for improvements, please open an issue in this repository. For general inquiries regarding the specification, please contact the project maintainers: support@vector.com

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Chiisai HAL Specification - Open-Source Specification for efficient HAL Development on small Microcontrollers

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