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Original file line number Diff line number Diff line change
@@ -1,16 +1,15 @@
#!/bin/sh
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2022 Intel Corporation. All rights reserved.
# Copyright(c) 2022-2026 Intel Corporation. All rights reserved.

set -e

RAW_INPUT=in.raw
RAW_OUTPUT=mfcc.raw

export LD_LIBRARY_PATH=../../testbench/build_testbench/sof_ep/install/lib:../../testbench/build_testbench/sof_parser/install/lib

TESTBENCH=../../testbench/build_testbench/install/bin/testbench
OPT="-q -r 16000 -R 16000 -c 1 -n 1 -b S16_LE -t ../../build_tools/test/topology/test-playback-ssp5-mclk-0-I2S-mfcc-s16le-s16le-48k-24576k-codec.tplg"
TESTBENCH=$SOF_WORKSPACE/sof/tools/testbench/build_testbench/install/bin/sof-testbench4
TOPOLOGY=$SOF_WORKSPACE/sof/tools/build_tools/topology/topology2/development/sof-hda-benchmark-mfcc16.tplg
OPT="-r 16000 -c 2 -b S16_LE -p 3,4 -t $TOPOLOGY -i $RAW_INPUT -o $RAW_OUTPUT"

# Convert input audio file raw 16 kHz 1 channel 16 bit
sox --encoding signed-integer "$1" -L -r 16000 -c 1 -b 16 "$RAW_INPUT"
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,11 +5,12 @@
% below from code
%
% Create binary configuration blob for MFCC component. The hex data
% is written to tools/topology/topology1/m4/mfcc/mfcc_config.m4
% is written to tools/topology/topology2/include/components/mfcc and
% tools/topology/topology1/m4/mfcc.

% SPDX-License-Identifier: BSD-3-Clause
%
% Copyright (c) 2018-2020, Intel Corporation. All rights reserved.
% Copyright (c) 2018-2026, Intel Corporation. All rights reserved.

function setup_mfcc(cfg)

Expand Down Expand Up @@ -45,12 +46,14 @@ function setup_mfcc(cfg)
cfg.top_db = 200; % Set to 80 for librosa
end

cfg.tplg_fn = '../../topology/topology1/m4/mfcc/mfcc_config.m4';
cfg.tools = '../../../../tools/';

cfg.tplg_fn = [cfg.tools 'topology/topology1/m4/mfcc/mfcc_config.m4'];
cfg.tplg_ver = 1;
cfg.ipc_ver = 3;
export_mfcc_setup(cfg);

cfg.tplg_fn = '../../topology/topology2/include/components/mfcc/default.conf';
cfg.tplg_fn = [cfg.tools 'topology/topology2/include/components/mfcc/default.conf'];
cfg.tplg_ver = 2;
cfg.ipc_ver = 4;
export_mfcc_setup(cfg);
Expand All @@ -60,7 +63,7 @@ function setup_mfcc(cfg)
function export_mfcc_setup(cfg)

%% Use blob tool from EQ
addpath('../common');
addpath([cfg.tools 'tune/common']);

%% Blob size, size plus reserved(8) + current parameters
nbytes_data = 104;
Expand Down Expand Up @@ -122,16 +125,16 @@ function export_mfcc_setup(cfg)
case 1
sof_tplg_write(cfg.tplg_fn, b8, "DEF_MFCC_PRIV", ...
"Exported with script setup_mfcc.m", ...
"cd tools/tune/mfcc; octave setup_mfcc.m");
"cd src/audio/mfcc/tune; octave setup_mfcc.m");
case 2
sof_tplg2_write(cfg.tplg_fn, b8, "mfcc_config", ...
"Exported MFCC configuration", ...
"cd tools/tune/mfcc; octave setup_mfcc.m");
"cd src/audio/mfcc/tune; octave setup_mfcc.m");
otherwise
error("Illegal cfg.tplg_ver, use 1 for topology v1 or 2 topology v2.");
end

rmpath('../common');
rmpath([cfg.tools 'tune/common']);

end

Expand Down
6 changes: 4 additions & 2 deletions tools/testbench/file.c
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,6 @@
#include "testbench/file_ipc4.h"
#include "../../src/audio/copier/copier.h"


SOF_DEFINE_REG_UUID(file);
DECLARE_TR_CTX(file_tr, SOF_UUID(file_uuid), LOG_LEVEL_INFO);
LOG_MODULE_REGISTER(file, CONFIG_SOF_LOG_LEVEL);
Expand Down Expand Up @@ -669,7 +668,8 @@ static int file_init(struct processing_module *mod)
}

/* Change to DAI type is needed to avoid uninitialized hw params in
* pipeline_params, A file host can be left as SOF_COMP_MODULE_ADAPTER
* pipeline_params. For capture the file write is the host so set
* SOF_COMP_HOST to skip sink check in module_adapter_prepare().
*/
if (dev->direction == SOF_IPC_STREAM_PLAYBACK) {
dev->ipc_config.type = SOF_COMP_DAI;
Expand All @@ -678,6 +678,8 @@ static int file_init(struct processing_module *mod)
fprintf(stderr, "error: failed set dai data.\n");
goto error;
}
} else {
dev->ipc_config.type = SOF_COMP_HOST;
}

break;
Expand Down
17 changes: 17 additions & 0 deletions tools/topology/topology2/cavs-benchmark-hda.conf
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@
<gain.conf>
<igo_nr.conf>
<level_multiplier.conf>
<mfcc.conf>
<micsel.conf>
<mixin.conf>
<mixout.conf>
Expand Down Expand Up @@ -817,6 +818,22 @@ IncludeByKey.BENCH_CONFIG {
<include/bench/level_multiplier_s32.conf>
}

#
# MFCC component
#

"mfcc16" {
<include/bench/mfcc_s16.conf>
}

"mfcc24" {
<include/bench/mfcc_s24.conf>
}

"mfcc32" {
<include/bench/mfcc_s32.conf>
}

#
# Micsel component
#
Expand Down
7 changes: 7 additions & 0 deletions tools/topology/topology2/cavs-benchmark-sdw.conf
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@
<gain.conf>
<igo_nr.conf>
<level_multiplier.conf>
<mfcc.conf>
<micsel.conf>
<multiband_drc.conf>
<rtnr.conf>
Expand Down Expand Up @@ -440,6 +441,12 @@ IncludeByKey.BENCH_CONFIG {
<include/bench/level_multiplier_s32.conf>
}

# MFCC benchmark configs are intentionally not enabled in the SDW
# benchmark topology because the SDW ALH DAI/coprocessor side is
# constrained to $JACK_RATE while MFCC bench configs operate in a
# different rate domain. Re-enable only after adding a matching rate
# override or explicit sample-rate conversion.

#
# Micsel component
#
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@ set(components
"gain"
"igo_nr"
"level_multiplier"
"mfcc"
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Copilot AI Apr 27, 2026

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mfcc is now included in the generic components list, which means this CMake loop will also generate SDW benchmark targets for MFCC. However cavs-benchmark-sdw.conf intentionally does not define any BENCH_CONFIG keys for mfcc16/24/32, so those generated SDW topologies will silently omit MFCC and produce misleading/incorrect artifacts. Consider either excluding MFCC from the SDW target generation here (special-case comp == mfcc) or adding properly rate-matched MFCC entries to the SDW IncludeByKey.BENCH_CONFIG block.

Suggested change
"mfcc"

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I don't prefer to do that to not create CMake complexity that would be changed again later. The tests are not running the SDW benchmark variants. The topology built for SDW now is just empty. I'll create in later phase topologies for real devices with SRC in a split pipeline from the module copier.

"micsel"
"rtnr"
"sound_dose"
Expand All @@ -43,6 +44,7 @@ set(component_parameters
"BENCH_GAIN_PARAMS=default"
"BENCH_IGO_NR_PARAMS=default"
"BENCH_LEVEL_MULTIPLIER_PARAMS=default"
"BENCH_MFCC_PARAMS=default"
"BENCH_MICSEL_PARAMS=passthrough"
"BENCH_RTNR_PARAMS=default"
"BENCH_SOUND_DOSE_PARAMS=default"
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,74 @@
Object.Pipeline {
host-gateway-playback [
{
index $BENCH_PLAYBACK_HOST_PIPELINE
Object.Widget.host-copier.1 {
stream_name $ANALOG_PLAYBACK_PCM
pcm_id 0
num_input_audio_formats 3
num_output_audio_formats 1
Object.Base.input_audio_format [
{
in_bit_depth 16
in_valid_bit_depth 16
in_rate 16000
Comment thread
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}
{
in_bit_depth 32
in_valid_bit_depth 24
in_rate 16000
}
{
in_bit_depth 32
in_valid_bit_depth 32
in_rate 16000
}
]
Object.Base.output_audio_format [
{
out_bit_depth 16
out_valid_bit_depth 16
out_rate 16000
}
]
}
}
]

host-gateway-capture [
{
index $BENCH_CAPTURE_HOST_PIPELINE
Object.Widget.host-copier.1 {
stream_name $ANALOG_CAPTURE_PCM
pcm_id 0
num_input_audio_formats 1
num_output_audio_formats 3
Object.Base.input_audio_format [
{
in_bit_depth 16
in_valid_bit_depth 16
in_rate 16000
}
]
Object.Base.output_audio_format [
{
out_bit_depth 16
out_valid_bit_depth 16
out_rate 16000
}
{
out_bit_depth 32
out_valid_bit_depth 24
out_rate 16000
}
{
out_bit_depth 32
out_valid_bit_depth 32
out_rate 16000
}
]
}
}
]
}

Original file line number Diff line number Diff line change
@@ -0,0 +1,74 @@
Object.Pipeline {
host-gateway-playback [
{
index $BENCH_PLAYBACK_HOST_PIPELINE
Object.Widget.host-copier.1 {
stream_name $ANALOG_PLAYBACK_PCM
pcm_id 0
num_input_audio_formats 3
num_output_audio_formats 1
Object.Base.input_audio_format [
{
in_bit_depth 16
in_valid_bit_depth 16
in_rate 16000
}
{
in_bit_depth 32
in_valid_bit_depth 24
in_rate 16000
}
{
in_bit_depth 32
in_valid_bit_depth 32
in_rate 16000
}
]
Object.Base.output_audio_format [
{
out_bit_depth 32
out_valid_bit_depth 24
out_rate 16000
}
]
}
}
]

host-gateway-capture [
{
index $BENCH_CAPTURE_HOST_PIPELINE
Object.Widget.host-copier.1 {
stream_name $ANALOG_CAPTURE_PCM
pcm_id 0
num_input_audio_formats 1
num_output_audio_formats 3
Object.Base.input_audio_format [
{
in_bit_depth 32
in_valid_bit_depth 24
in_rate 16000
}
]
Object.Base.output_audio_format [
{
out_bit_depth 16
out_valid_bit_depth 16
out_rate 16000
}
{
out_bit_depth 32
out_valid_bit_depth 24
out_rate 16000
}
{
out_bit_depth 32
out_valid_bit_depth 32
out_rate 16000
}
]
}
}
]
}

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