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2 changes: 1 addition & 1 deletion crates/core_arch/src/powerpc/altivec.rs
Original file line number Diff line number Diff line change
Expand Up @@ -411,7 +411,7 @@ unsafe extern "unadjusted" {
}

#[macro_use]
mod sealed {
pub(crate) mod sealed {
use super::*;

#[unstable(feature = "stdarch_powerpc", issue = "111145")]
Expand Down
33 changes: 33 additions & 0 deletions crates/core_arch/src/powerpc/vsx.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@

use crate::core_arch::powerpc::*;
use crate::core_arch::simd::*;
use crate::intrinsics::simd::simd_add;

#[cfg(test)]
use stdarch_test::assert_instr;
Expand Down Expand Up @@ -171,6 +172,27 @@ mod sealed {
vec_mergeeo! { vector_unsigned_int, mergee, mergeo }
vec_mergeeo! { vector_bool_int, mergee, mergeo }
vec_mergeeo! { vector_float, mergee, mergeo }

#[inline]
#[target_feature(enable = "vsx")]
#[cfg_attr(test, assert_instr(xvadddp))]
pub(crate) unsafe fn vec_add_double_double(
a: vector_double,
b: vector_double,
) -> vector_double {
simd_add(a, b)
}
}

// Implement AltiVec's VectorAdd trait for vector_double to enable vec_add support
#[unstable(feature = "stdarch_powerpc", issue = "111145")]
impl crate::core_arch::powerpc::altivec::sealed::VectorAdd<vector_double> for vector_double {
type Result = vector_double;
#[inline]
#[target_feature(enable = "vsx")]
unsafe fn vec_add(self, other: vector_double) -> Self::Result {

@folkertdev folkertdev Jun 16, 2026

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is this the only function you'd want to do this for? I'd guess not?

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Sorry, I do not understand what you mean. Can you please elaborate?

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well what about vec_sub and other vec_* methods? Should they not also follow this pattern, or is vec_add special somehow?

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Ah yes! I do have a few more other ones to add. I tried to limit this PR to just vec_add as it is my first patch so I was just trying to get a feel on how these should be done.

I have a list of intrinsics that I need to add and the plan was to follow up with sets of 3/4 intrinsics based on type/complexity afterwards. Is there a preferred PR size/breakdown?

sealed::vec_add_double_double(self, other)
}
}
Comment on lines +187 to 196

@folkertdev folkertdev Jun 16, 2026

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So is the argument here that if you got your hands on a vector_double then vsx must be enabled?

Because normally adding stricter target features on a trait method is error-prone: there is now an additional safety requirement on that trait method, which is that if that particular instance is called, the target feature must be enabled.

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Yes that was the idea. On PPC, vec_add(vector_double, vector_double) should result in code gen xvadddp, which is only available if vsx feature is enabled.

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Hmm yeah the s390x implementation has the same sort of problem with float in their case. Many instructions for f32 were only added in a later target feature. Actually this is fine for vec_add because the implementation is just simd_add, which will generate xvadddp when the right target features are available, or some fallback thing (using scalars, probably) when that target feature is not available.


/// Vector permute.
Expand Down Expand Up @@ -255,4 +277,15 @@ mod tests {
test_vec_xxpermdi! {test_vec_xxpermdi_i64x2, i64x2, vector_signed_long, [0], [-1], [2], [-3]}
test_vec_xxpermdi! {test_vec_xxpermdi_m64x2, m64x2, vector_bool_long, [false], [true], [false], [true]}
test_vec_xxpermdi! {test_vec_xxpermdi_f64x2, f64x2, vector_double, [0.0], [1.0], [2.0], [3.0]}

#[simd_test(enable = "vsx")]
fn test_vec_add_f64x2_f64x2() {
let a = vector_double::from(f64x2::from_array([1.0, 2.0]));
let b = vector_double::from(f64x2::from_array([3.0, 4.0]));
let expected = vector_double::from(f64x2::from_array([4.0, 6.0]));

unsafe {
assert_eq!(f64x2::from(vec_add(a, b)), f64x2::from(expected));
}
}
}