Removed RI5CY and re-enabled CV32E40X in memory-mapped mode - #92
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luca24balboni wants to merge 3 commits into
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Removed RI5CY and re-enabled CV32E40X in memory-mapped mode#92luca24balboni wants to merge 3 commits into
luca24balboni wants to merge 3 commits into
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AlessandroNadalini
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Aug 6, 2026
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Overall legitimate, just a couple of comments to be addressed.
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…, it has issue for =1 with fpu_ss)
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This PR
core=is now CV32E40P (OpenHW,FondazioneChipsIT/cv32e40p) or CV32E40Xxif_inst_dispatcher, the iDMA and FractalSync instruction decoders,idma_ctrl, and the sixsw/tests/xif_tests): RedMulE, iDMA and FractalSync are now memory-mapped for both cores, so with CV32E40X the OBI crossbar grows from 5 to 7 subordinates and from 6 to 9 address rules andobi_mem_array_idx_ecollapses into a single enum; XIF survives only as the link tofpu_ss.cv32e40p_*/cv32e40x_*) and types the cluster data channel on CV32E40P: the cluster cores are always CV32E40P even when the control core is CV32E40X