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fix: 修复处理器缓存显示与 lscpu 不一致 (#373521) - #734

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GongHeng2017:fix/373521-cpu-cache-lscpu
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fix: 修复处理器缓存显示与 lscpu 不一致 (#373521)#734
GongHeng2017 wants to merge 1 commit into
linuxdeepin:develop/eaglefrom
GongHeng2017:fix/373521-cpu-cache-lscpu

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@GongHeng2017

@GongHeng2017 GongHeng2017 commented Aug 17, 2026

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修复:设备管理器-处理器缓存与 lscpu 显示不一致(PMS Bug 373521)

问题

设备管理器「处理器」页面顶部头部的 L1d/L1i/L2/L3 缓存显示与终端 lscpu 不一致:头部把单实例缓存按实例数累加成总量展示,而 lscpu 展示单实例大小。多核机型上每核私有缓存(L1d/L1i/L2)相差 N 倍(N=核数),L3 因被全部逻辑核共享(实例数=1)恰好一致。

实测(Loongson-3A6000,4 核/8 逻辑):头部显示 L1d=256 KiB / L1i=256 KiB / L2=1 MiB / L3=16 MiB,lscpu 显示单实例 64 KiB / 64 KiB / 256 KiB / 16 MiB,L1d/L1i/L2 差 4 倍。

根因

  • DeviceGenerator::calAndSetCpuHeaderInfoDeviceGenerator.cpp)对 L1d/L1i/L2/L3 调用 Common::formatTotalCache(单实例值, groupCount)groupCount = logicalNum / sharedCount,把单实例大小 ×实例数累加后展示。
  • Common::formatTotalCachecommonfunction.cpp)关键乘法 totalKiB = perCoreKiB * coreCount
  • 而设备管理器自身的「逻辑处理器明细」本就展示单实例值(= lscpu),内部「头部累加 vs 明细单实例」割裂。

修复

  • 头部 L1d/L1i/L2/L3 改为展示单实例大小(与 lscpu 口径对齐),不再 × groupCount 累加。
  • 新增 Common::formatCacheSize(cacheSize):单实例缓存大小单位归一化(KiB/MiB/GiB),复用原解析/归一化逻辑但去掉乘法。
  • 移除不再使用的 Common::formatTotalCacheCommon::parseSharedCpuCount(全仓仅此 4 处调用,已确认无其它引用/测试依赖)。

改动文件

  • deepin-devicemanager/src/GenerateDevice/DeviceGenerator.cpp — 4 个缓存块改用 formatCacheSize,移除 sharedCount/groupCount 计算
  • deepin-devicemanager/src/commonfunction.cppformatTotalCacheformatCacheSize(去乘法),移除 parseSharedCpuCount
  • deepin-devicemanager/src/commonfunction.h — 声明同步

验证

  • 两处改动文件用项目 CMake 生成的编译参数单独编译通过(-Wall,0 error / 0 warning)。
  • nm 符号校验:formatCacheSize 已定义并被引用,无 formatTotalCache/parseSharedCpuCount 残留符号。
  • 全量构建因环境缺 3rdparty Qt 私有头(private/qzipreader_p.h,与本次改动无关)未完成链接,但改动 TU 编译验证通过。

行为对比

缓存 修复前(头部,累加) 修复后(头部,单实例) lscpu
L1d 256 KiB 64 KiB 64 KiB ✅
L1i 256 KiB 64 KiB 64 KiB ✅
L2 1 MiB 256 KiB 256 KiB ✅
L3 16 MiB 16 MiB 16 MiB ✅

Bug: https://pms.uniontech.com/bug-view-373521.html

Summary by Sourcery

Align processor cache information in the device manager header with single-instance cache sizes reported by lscpu.

Bug Fixes:

  • Correct CPU cache values in the device manager header to show per-instance sizes instead of multiplied totals, matching lscpu output.

Enhancements:

  • Introduce a generic cache size formatting helper that normalizes cache units without relying on core or instance counts.
  • Remove unused cache aggregation and shared-CPU parsing utilities from the common helpers interface.

1. 修复处理器头部缓存按实例数累加导致与 lscpu 显示不一致的问题;
2. 将 calAndSetCpuHeaderInfo 中 L1d/L1i/L2/L3 缓存改为展示单实例大小;
3. 新增 Common::formatCacheSize 用于单实例缓存大小单位归一化(KiB/MiB/GiB);
4. 移除不再使用的 Common::formatTotalCache 与 Common::parseSharedCpuCount;

=====================================

1. fix processor header cache being multiplied by instance count, which mismatched lscpu output;
2. show single-instance cache size for L1d/L1i/L2/L3 in calAndSetCpuHeaderInfo;
3. add Common::formatCacheSize to normalize single-instance cache size (KiB/MiB/GiB);
4. remove unused Common::formatTotalCache and Common::parseSharedCpuCount;

Log: 修复设备管理器处理器页面顶部缓存显示与终端 lscpu 不一致的问题,改为显示单实例缓存大小,与 lscpu 口径对齐

Bug: https://pms.uniontech.com/bug-view-373521.html

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[APPROVALNOTIFIER] This PR is NOT APPROVED

This pull-request has been approved by: GongHeng2017

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sourcery-ai Bot commented Aug 17, 2026

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Reviewer's Guide

CPU header cache display is changed to show per-instance cache sizes aligned with lscpu, by replacing the previous total-cache calculation utility with a new unit-normalization helper and removing unused shared-CPU parsing logic.

File-Level Changes

Change Details Files
CPU header now displays L1d/L1i/L2/L3 cache as single-instance sizes instead of aggregated totals.
  • Replace use of formatTotalCache with formatCacheSize when formatting L1d/L1i/L2/L3 cache values in CPU header info generation.
  • Remove all sharedCount/groupCount calculations based on shared cpu list fields for cache display.
  • Keep header labeling (L1d/L1i/L2/L3 cache) and list population logic otherwise unchanged.
deepin-devicemanager/src/GenerateDevice/DeviceGenerator.cpp
Introduce a cache-size-only formatter and remove total-cache and shared-CPU helpers no longer needed.
  • Refactor formatTotalCache into formatCacheSize that trims input, parses numeric value and unit, converts to KiB, and re-normalizes to KiB/MiB/GiB without multiplying by core count.
  • Delete parseSharedCpuCount implementation that parsed CPU-sharing lists into counts.
  • Update Common class declaration to remove formatTotalCache and parseSharedCpuCount and add formatCacheSize signature.
deepin-devicemanager/src/commonfunction.cpp
deepin-devicemanager/src/commonfunction.h

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deepin pr auto review

★ 总体评分:100分

■ 【总体评价】

代码成功修复了CPU缓存大小计算错误的BUG,逻辑清晰且无安全风险
代码准确移除了错误的累加逻辑和冗余函数,完全符合预期修复目标

■ 【详细分析】

  • 1.语法逻辑(完全正确)✓

修复准确针对了根因,DeviceGenerator.cpp中calAndSetCpuHeaderInfo函数移除了错误的解析与乘法计算逻辑,commonfunction.cpp中formatCacheSize函数直接处理单实例缓存大小转换,不再执行累加操作,逻辑完全正确
建议:无需额外修改

  • 2.代码质量(良好)✓

函数命名从formatTotalCache改为formatCacheSize更准确反映了其格式化单实例大小的职责,同时彻底删除了不再需要的parseSharedCpuCount函数,降低了代码维护成本和圈复杂度
建议:DeviceGenerator.cpp中L1d、L1i、L2、L3的处理逻辑高度相似,未来可考虑抽取为通用传参方法以消除重复代码

  • 3.代码性能(高效)✓

移除了parseSharedCpuCount函数中的字符串分割、遍历与类型转换操作,减少了不必要的CPU开销,格式化函数仅做简单的单位换算,执行效率高
建议:无需额外修改

  • 4.代码安全(存在0个安全漏洞)✓

漏洞对比统计:新增漏洞 0 个,减少漏洞 0 个,持平 0 个
代码移除了对/proc/cpuinfo中shared cpu list字段的解析处理,消除了因恶意构造该字段可能引发的潜在异常处理风险,本次修改未引入任何新的安全漏洞

  • 建议:保持当前的简洁处理逻辑,避免引入额外的不必要解析

■ 【改进建议代码示例】

// 当前代码已足够优秀,以下为针对重复代码的进一步优化建议示例(非必须)
// DeviceGenerator.cpp 中的优化方向
void DeviceGenerator::appendCacheInfo(const QMap<QString, QString> &info,
                                      const QString &key,
                                      QList<QPair<QString, QString>> &outList)
{
    if (info.contains(key)) {
        QString formattedSize = Common::formatCacheSize(info.value(key));
        if (!formattedSize.isEmpty()) {
            outList.push_back(qMakePair(tr(key.toUtf8().constData()), formattedSize));
        }
    }
}

// 调用处简化为:
// appendCacheInfo(firstProcessorInfo, "L1d cache", singleCpuHeaderInfo);
// appendCacheInfo(firstProcessorInfo, "L1i cache", singleCpuHeaderInfo);
// appendCacheInfo(firstProcessorInfo, "L2 cache", singleCpuHeaderInfo);
// appendCacheInfo(firstProcessorInfo, "L3 cache", singleCpuHeaderInfo);

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