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initrd, doc, boards: TPM GPIO reset vulnerability analysis, PoC tool, and board annotations#2165

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initrd, doc, boards: TPM GPIO reset vulnerability analysis, PoC tool, and board annotations#2165
tlaurion wants to merge 3 commits into
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tlaurion:doc/tpm-gpio-vuln

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@tlaurion tlaurion commented Jul 23, 2026

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initrd/bin/tpm-gpio-reset-demo.sh

  • Bash script with --audit and --execute modes
  • Platform detection via PCI device ID
  • 3-tier vulnerability classification (confirmed, unconfirmed, uncertain)
  • Bus pin lock checking with PADCFGLOCKTX verification (kukri detect parity)
  • Auto-detects eSPI vs LPC mode
  • Distinguishes PLTRST# bus reset from software TPM2_Startup clearing via sysfs pcrs
  • Platform support: SPT/KBP, CNP-LP, CFL-S, CML-U, CML-DT, TGL, ADL-P, ADL-S, RPL-S, ARL-S, MTL, pre-Skylake
  • View source

doc/TPM_GPIO_Reset_Vulnerability.md

  • Per-platform feasibility table with Intel doc 834810 (public) cross-reference
  • TPM Reset explained as restart to power-on state (PCRs cleared, NVRAM preserved)
  • PCR0 analysis per TCG specification
  • View source

doc/TPM_GPIO_Reset_Approaches.md

  • 8 approaches attempted on NV4x ADL-P with register-level documentation
  • Platform register maps for all PCH families
  • Star Labs PchUnlockGpioPads fix and coreboot patch status
  • View source

doc/BOARDS_AND_TESTERS.md

  • Refactored per-board EOL/ESU tables with EOL_ prefix definition
  • Authoritative vendor source references (Intel, AMD, IBM)
  • Concise board tester lists with ESU status
  • TPM GPIO cross-reference to Vulnerability.md
  • Mitigation section with cross-ref to wiki threat model
  • View source

boards/

  • TPM_GPIO_RESET CAVEATS annotations on 50 board configs
  • NOT_VULNERABLE: Pre-Skylake (dedicated PLTRST#), Talos II (POWER9), V540TU/V560TU (eSPI TPM)
  • VULNERABLE: Skylake through Comet Lake
  • VULNERABILITY UNCERTAIN: ADL-P 0x5182 (NV4x, NS50)
  • NOT_APPLICABLE: Librem 11, Mini v1, Mini v2 (CONFIG_NO_TPM=y)

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Copilot AI review requested due to automatic review settings July 23, 2026 20:36

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tlaurion force-pushed the doc/tpm-gpio-vuln branch 2 times, most recently from b7b3da1 to ba642c6 Compare July 24, 2026 18:45
tlaurion added 3 commits July 24, 2026 14:45
…tion PoC

Bash script with --audit and --execute modes. Detects PCH/SoC via
PCI device ID, reads DW0, PADCFGLOCK, and PADCFGLOCKTX from /dev/mem.
Reports 3-tier vulnerability classification (confirmed, unconfirmed,
uncertain). Performs GPIO assertion, deassert, and tpm2 startup,
distinguishing bus reset from software TPM2_Startup clearing via
sysfs pcrs presence. Includes bus pin lock checking (kukri detect
parity), eSPI vs LPC auto-detection, and platform support for
SPT/KBP, CNP-LP, CFL-S, CML-U, CML-DT, TGL, ADL-P, ADL-S, RPL-S,
ARL-S, MTL, and pre-Skylake.

Signed-off-by: Thierry Laurion <insurgo@riseup.net>
TPM_GPIO_Reset_Vulnerability.md — per-platform feasibility table.
Pre-Skylake: not vulnerable (dedicated PLTRST# pin, architecture
documentation — no hardware verification). SPT/KBP (T480, M900):
vulnerable per kukri. CNP-LP (T480s): unconfirmed. ADL-P 0x5182
(NV4x, NS50): inconclusive — writes verify via /dev/mem readback,
PCRs non-zero after toggle, kernel TPM driver detects no bus reset.
ADL-S/RPL-S (MSI Z690/Z790): vulnerable per kukri. MTL (V540TU/
V560TU): not vulnerable (eSPI TPM, SLB 9672). PCR0 analysis per
TCG PC Client TIS spec: no protection against TPM GPIO reset.

TPM_GPIO_Reset_Approaches.md — 8 approaches on NV4x ADL-P.
Platform register maps for SPT/KBP, CNP-LP, CFL-S, CML-U, CML-DT,
TGL, ADL-P, ADL-S, RPL-S, ARL-S, MTL. Star Labs PchUnlockGpioPads
fix and coreboot patch series status. Intel doc 834810 (public)
cross-referenced for PADCFGLOCK/PADCFGLOCKTX documentation.

doc/BOARDS_AND_TESTERS.md — per-generation EOL/ESU dates, TPM GPIO
reset status, QSB-107 EOL_ prefix convention, M900 Tower owner.

Signed-off-by: Thierry Laurion <insurgo@riseup.net>
Add '# CAVEATS: TPM_GPIO_RESET=' comment to 50 hardware board
configs. NOT_VULNERABLE for Pre-Skylake (dedicated PLTRST# pin)
and Talos II (POWER9). VULNERABLE for Skylake through Comet Lake.
VULNERABILITY UNCERTAIN for ADL-P 0x5182 (NV4x, NS50 — writes
verify, PLTRST# not confirmed on this die). NOT_APPLICABLE for
Librem 11, Mini v1, Mini v2 (CONFIG_NO_TPM=y, no TPM hardware).
NOT_VULNERABLE for MTL v540tu/v560tu (eSPI TPM, SLB 9672).

blobs: update TPM reset attack references in m900 and xx80 READMEs.
Signed-off-by: Thierry Laurion <insurgo@riseup.net>
@tlaurion
tlaurion force-pushed the doc/tpm-gpio-vuln branch from ba642c6 to d16719c Compare July 24, 2026 18:45
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Not enough space to even pack a script under t420/x220 here (we knew this will come at some point from previous pr #2148 which fixed t420 that couldn't build. This is known issue #2147

Help needed #590 or more practically #1991

But yeah, t420 and x220 might go unmaintained until this is done.

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GPIO locking is broken on Kaby Lake and possibly other platforms

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