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Add google kano flashing guide#223

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Add google kano flashing guide#223
cwiggs wants to merge 1 commit into
linuxboot:masterfrom
cwiggs:device-kano

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@cwiggs cwiggs commented Jul 22, 2026

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Signed-off-by: Chris Wiggins <chris@cwiggs.com>
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cwiggs marked this pull request as draft July 22, 2026 21:22
TODO: Do we need to run `gsctool` from ChromeOS? I did not have to but maybe the previous owner of my Kano
device did it? [source](https://docs.mrchromebox.tech/docs/firmware/wp/disabling.html#step-1-enabling-closed-case-debugging-ccd)

Now we disable software write protection:

@tlaurion tlaurion Jul 22, 2026

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@MrChromebox this is weird and we don't understand.

Even if IFD has all regions disabled per linuxboot/heads#2133 's linuxboot/heads@aece972

Found Master Section
FLMSTR1:   0xffffffff (Host CPU/BIOS)
  EC Region Write Access:            enabled
  Platform Data Region Write Access: enabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     enabled
  EC Region Read Access:             enabled
  Platform Data Region Read Access:  enabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled
FLMSTR2:   0xffffffff (Intel ME)
  EC Region Write Access:            enabled
  Platform Data Region Write Access: enabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     enabled
  EC Region Read Access:             enabled
  Platform Data Region Read Access:  enabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled
FLMSTR3:   0xffffffff (GbE)
  EC Region Write Access:            enabled
  Platform Data Region Write Access: enabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     enabled
  EC Region Read Access:             enabled
  Platform Data Region Read Access:  enabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled
FLMSTR5:   0xffffffff (EC)
  EC Region Write Access:            enabled
  Platform Data Region Write Access: enabled
  GbE Region Write Access:           enabled
  Intel ME Region Write Access:      enabled
  Host CPU/BIOS Region Write Access: enabled
  Flash Descriptor Write Access:     enabled
  EC Region Read Access:             enabled
  Platform Data Region Read Access:  enabled
  GbE Region Read Access:            enabled
  Intel ME Region Read Access:       enabled
  Host CPU/BIOS Region Read Access:  enabled
  Flash Descriptor Read Access:      enabled

Heads flashprog -p internal still reports:



flashprog unknown on Linux 6.6.30-Heads (x86_64)
flashprog is free software, get the source code at https://flashprog.org

Calibrating delay loop... OK.
coreboot table found at 0x76883000.
Found chipset "Intel Alder Lake-P".
Enabling flash write... GPR0: Warning: 0x00001000-0x001a6fff is read-only.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
OK.
Found Programmer flash chip "Opaque flash chip" (32768 kB, Programmer-specific) on internal.
No operations were specified.

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Also Heads recovery shell cbmem --console | grep '[DEBUG] ME' returns:

[DEBUG]  ME: HFSTS1                      : 0x90000055
[DEBUG]  ME: HFSTS2                      : 0x82130116
[DEBUG]  ME: HFSTS3                      : 0x00000050
[DEBUG]  ME: HFSTS4                      : 0x00004000
[DEBUG]  ME: HFSTS5                      : 0x00000000
[DEBUG]  ME: HFSTS6                      : 0x40600006
[DEBUG]  ME: Manufacturing Mode          : YES
[DEBUG]  ME: SPI Protection Mode Enabled : NO
[DEBUG]  ME: FW Partition Table          : OK
[DEBUG]  ME: Bringup Loader Failure      : NO
[DEBUG]  ME: Firmware Init Complete      : NO
[DEBUG]  ME: Boot Options Present        : NO
[DEBUG]  ME: Update In Progress          : NO
[DEBUG]  ME: D0i3 Support                : YES
[DEBUG]  ME: Low Power State Enabled     : NO
[DEBUG]  ME: CPU Replaced                : YES
[DEBUG]  ME: CPU Replacement Valid       : YES
[DEBUG]  ME: Current Working State       : 5
[DEBUG]  ME: Current Operation State     : 1
[DEBUG]  ME: Current Operation Mode      : 0
[DEBUG]  ME: Error Code                  : 0
[DEBUG]  ME: FPFs Committed              : YES
[DEBUG]  ME: Enhanced Debug Mode         : NO
[DEBUG]  ME: CPU Debug Disabled          : YES
[DEBUG]  ME: TXT Support                 : NO
[DEBUG]  ME: Manufacturing Vars Locked   : YES
[DEBUG]  ME: WP for RO is enabled        : YES
[DEBUG]  ME: RO write protection scope - Start=0x1000, End=0x1A6FFF

So ME region still protected.

[DEBUG] ME: WP for RO is enabled : YES
[DEBUG] ME: RO write protection scope - Start=0x1000, End=0x1A6FFF

@tlaurion tlaurion left a comment

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@MrChromebox we need some help figuring out what steps are needed to properly disactivate HW+SW protection so ME is not reported as locked

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