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Detect and use zicond in ifconversion on riscv64#128799

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Detect and use zicond in ifconversion on riscv64#128799
am11 wants to merge 2 commits into
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am11:feature/riscv64/detect-and-use-zicond

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@am11 am11 commented May 30, 2026

With DOTNET_EnableRiscV64Zicond=0:

; Assembly listing for method Xunit.Sdk.AssertEqualityComparer`1[int]:Equals(int,Xunit.Sdk.CollectionTracker,int,Xunit.Sdk.CollectionTracker):Xunit.Sdk.AssertEqualityResult:this (FullOpts)
; Emitting BLENDED_CODE for riscv64 on Unix
; FullOpts code
; optimized code
; fp based frame
; fully interruptible
; No PGO data
; 6 inlinees with PGO data; 31 single block inlinees; 3 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
            addi           sp, sp, -64
            sd             fp, 16(sp)
            sd             ra, 24(sp)
            sd             s1, 32(sp)
            sd             s2, 40(sp)
            sd             s3, 48(sp)
            sd             s4, 56(sp)
            addi           fp, sp, 16
            sw             a1, -4(fp)
            sw             a3, -8(fp)
            mv             s1, a0
            mv             s2, a2
            mv             s3, a4
 
G_M000_IG02:                ;; offset=0x0034
            lui            a0, -63449
            addiw          a0, a0, -1801
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F841347B8 dec=272798795704
            auipc          a2, -5386
            ld             a2, -1804(a2)
            jalr           a2		// System.RuntimeType:get_IsGenericType():bool:this
            sext.w         a0, a0
            beqz           a0, G_M000_IG17
            lui            a0, -63449
            addiw          a0, a0, -1801
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F841347B8 dec=272798795704
            auipc          a1, -5386
            ld             a1, -1760(a1)
            jalr           a1		// System.RuntimeType:GetGenericTypeDefinition():System.Type:this
            lui            a1, -31725
            addiw          a1, a1, 1163
            slli           a1, a1, 30
            srli           a1, a1, 26		;; load imm: hex=0x0000003F841348B0 dec=272798795952
            bne            a0, a1, G_M000_IG17
            beqz           s2, G_M000_IG03
            bnez           s3, G_M000_IG08
 
G_M000_IG03:                ;; offset=0x0090
            lw             a1, -4(fp)
            sext.w         a0, a1
            lw             a3, -8(fp)
            sext.w         a2, a3
            blt            a0, a2, G_M000_IG06
 
G_M000_IG04:                ;; offset=0x00A4
            sext.w         a0, a1
            sext.w         a2, a3
            slt            s1, a2, a0
 
G_M000_IG05:                ;; offset=0x00B0
            auipc          s4, -61
            addi           s4, s4, -1088
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1570(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            sext.w         a0, s1
            sltiu          s2, a0, 1
            lw             a1, -4(fp)
            sw             a1, 8(s3)
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1538(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a3, -8(fp)
            sw             a3, 8(s1)
            lui            a0, -123005
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F0FC1A9D8 dec=270847289816
            auipc          ra, 515910
            jalr           ra, 1502(ra)		// CORINFO_HELP_NEWSFAST
            sb             s2, 40(a0)
            addi           t3, a0, 24
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 1262(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s1
            auipc          ra, -5413
            jalr           ra, 1246(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
            j              G_M000_IG07
 
G_M000_IG06:                ;; offset=0x0140
            addi           s1, zero, -1
            j              G_M000_IG05
 
G_M000_IG07:                ;; offset=0x0148
            j              G_M000_IG18
 
G_M000_IG08:                ;; offset=0x014C
            ld             a0, 8(s1)
            fence          3, 3
            ld             a1, 8(a0)
            bnez           a1, G_M000_IG15
 
G_M000_IG09:                ;; offset=0x015C
            ld             s4, 24(a0)
 
G_M000_IG10:                ;; offset=0x0160
            ld             a0, 8(s1)
            fence          3, 3
            ld             a1, 8(a0)
            bnez           a1, G_M000_IG16
 
G_M000_IG11:                ;; offset=0x0170
            ld             s1, 24(a0)
 
G_M000_IG12:                ;; offset=0x0174
            fence          3, 3
            auipc          a0, 184
            lw             a0, -936(a0)
            andi           a0, a0, 1
            sext.w         a0, a0
            beqz           a0, G_M000_IG19
 
G_M000_IG13:                ;; offset=0x018C
            lui            a3, 14
            addiw          a3, a3, -783
            slli           a3, a3, 22		;; load imm: hex=0x000000373C400000 dec=237234028544
            ld             a3, 408(a3)
            sub            a3, s1, a3
            sltiu          a3, a3, 1
            mv             a1, s3
            mv             a2, s4
            mv             a0, s2
            auipc          a4, -71
            ld             a4, 280(a4)
 
G_M000_IG14:                ;; offset=0x01B8
            ld             s4, 56(sp)
            ld             s3, 48(sp)
            ld             s2, 40(sp)
            ld             s1, 32(sp)
            ld             ra, 24(sp)
            ld             fp, 16(sp)
            addi           sp, sp, 64
            jr             a4		// Xunit.Sdk.CollectionTracker:AreCollectionsEqual(Xunit.Sdk.CollectionTracker,Xunit.Sdk.CollectionTracker,System.Collections.IEqualityComparer,bool):Xunit.Sdk.AssertEqualityResult
 
G_M000_IG15:                ;; offset=0x01D8
            auipc          a1, -71
            ld             a1, 176(a1)
            jalr           a1		// System.Lazy`1[System.__Canon]:CreateValue():System.__Canon:this
            mv             s4, a0
            j              G_M000_IG10
 
G_M000_IG16:                ;; offset=0x01EC
            auipc          a1, -71
            ld             a1, 156(a1)
            jalr           a1		// System.Lazy`1[System.__Canon]:CreateValue():System.__Canon:this
            mv             s1, a0
            j              G_M000_IG12
 
G_M000_IG17:                ;; offset=0x0200
            auipc          s4, -61
            addi           s4, s4, -1424
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1234(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a1, -4(fp)
            lw             a3, -8(fp)
            subw           a0, a1, a3
            sltiu          s2, a0, 1
            sw             a1, 8(s1)
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1198(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            lw             a3, -8(fp)
            sw             a3, 8(s3)
            lui            a0, -123005
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F0FC1A9D8 dec=270847289816
            auipc          ra, 515910
            jalr           ra, 1162(ra)		// CORINFO_HELP_NEWSFAST
            sb             s2, 40(a0)
            addi           t3, a0, 24
            mv             t4, s1
            auipc          ra, -5413
            jalr           ra, 922(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 906(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
 
G_M000_IG18:                ;; offset=0x0290
            ld             s4, 56(sp)
            ld             s3, 48(sp)
            ld             s2, 40(sp)
            ld             s1, 32(sp)
            ld             ra, 24(sp)
            ld             fp, 16(sp)
            addi           sp, sp, 64
            ret 
G_M000_IG19:                ;; offset=0x02B0
            lui            a0, -61505
            addiw          a0, a0, -911
            slli           a0, a0, 30
            srli           a0, a0, 26		;; load imm: hex=0x0000003F0FBEC710 dec=270847100688
            auipc          ra, -4153
            jalr           ra, 1336(ra)		// CORINFO_HELP_GET_GCSTATIC_BASE
            j              G_M000_IG13
 
G_M000_IG20:                ;; offset=0x02CC
            auipc          s4, -61
            addi           s4, s4, -1628
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1030(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a1, -4(fp)
            sw             a1, 8(s1)
 
G_M000_IG21:                ;; offset=0x02EC
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 1006(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a3, -8(fp)
            sw             a3, 8(s2)
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 982(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            mv             a1, s2
            addi           a0, s1, 8
            auipc          a2, -70
            ld             a2, -1076(a2)
            jalr           a2		// System.Int32:CompareTo(System.Object):int:this
            sext.w         a0, a0
            sltiu          s1, a0, 1
            lw             a1, -4(fp)
            sw             a1, 8(s3)
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 930(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a3, -8(fp)
            sw             a3, 8(s2)
            lui            a0, -123005
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F0FC1A9D8 dec=270847289816
            auipc          ra, 515910
            jalr           ra, 894(ra)		// CORINFO_HELP_NEWSFAST
            sb             s1, 40(a0)
            addi           t3, a0, 24
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 654(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s2
            auipc          ra, -5413
            jalr           ra, 638(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
            j              G_M000_IG07
 
G_M000_IG22:                ;; offset=0x03A0
            lw             a1, -4(fp)
            lw             a3, -8(fp)
            subw           a0, a1, a3
            sltiu          s1, a0, 1
            auipc          s4, -61
            addi           s4, s4, -1856
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 802(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a1, -4(fp)
            sw             a1, 8(s2)
            mv             a0, s4
            auipc          ra, 515910
            jalr           ra, 778(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            lw             a3, -8(fp)
            sw             a3, 8(s3)
            lui            a0, -123005
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F0FC1A9D8 dec=270847289816
            auipc          ra, 515910
            jalr           ra, 742(ra)		// CORINFO_HELP_NEWSFAST
            sb             s1, 40(a0)
            addi           t3, a0, 24
            mv             t4, s2
            auipc          ra, -5413
            jalr           ra, 502(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 486(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
            j              G_M000_IG18
 
G_M000_IG23:                ;; offset=0x0438
            addi           sp, sp, -64
            sd             fp, 0(sp)
            sd             ra, 8(sp)
            sd             s1, 16(sp)
            sd             s2, 24(sp)
            sd             s3, 32(sp)
            sd             s4, 40(sp)
 
G_M000_IG24:                ;; offset=0x0454
            auipc          a0, 0
            addi           a0, a0, -392
 
G_M000_IG25:                ;; offset=0x045C
            ld             s4, 40(sp)
            ld             s3, 32(sp)
            ld             s2, 24(sp)
            ld             s1, 16(sp)
            ld             ra, 8(sp)
            ld             fp, 0(sp)
            addi           sp, sp, 64
            ret 
G_M000_IG26:                ;; offset=0x047C
            addi           sp, sp, -64
            sd             fp, 0(sp)
            sd             ra, 8(sp)
            sd             s1, 16(sp)
            sd             s2, 24(sp)
            sd             s3, 32(sp)
            sd             s4, 40(sp)
 
G_M000_IG27:                ;; offset=0x0498
            auipc          a0, 0
            addi           a0, a0, -248
 
G_M000_IG28:                ;; offset=0x04A0
            ld             s4, 40(sp)
            ld             s3, 32(sp)
            ld             s2, 24(sp)
            ld             s1, 16(sp)
            ld             ra, 8(sp)
            ld             fp, 0(sp)
            addi           sp, sp, 64
            ret 
; Total bytes of code 1216

and with DOTNET_EnableRiscV64Zicond=1 (default)

; Assembly listing for method Xunit.Sdk.AssertEqualityComparer`1[int]:Equals(int,Xunit.Sdk.CollectionTracker,int,Xunit.Sdk.CollectionTracker):Xunit.Sdk.AssertEqualityResult:this (FullOpts)
; Emitting BLENDED_CODE for riscv64 on Unix
; FullOpts code
; optimized code
; fp based frame
; fully interruptible
; No PGO data
; 6 inlinees with PGO data; 31 single block inlinees; 3 inlinees without PGO data

G_M000_IG01:                ;; offset=0x0000
            addi           sp, sp, -64
            sd             fp, 16(sp)
            sd             ra, 24(sp)
            sd             s1, 32(sp)
            sd             s2, 40(sp)
            sd             s3, 48(sp)
            sd             s4, 56(sp)
            addi           fp, sp, 16
            sw             a1, -4(fp)
            sw             a3, -8(fp)
            mv             s1, a0
            mv             s2, a2
            mv             s3, a4
 
G_M000_IG02:                ;; offset=0x0034
            lui            a0, -45039
            addiw          a0, a0, -1289
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003FA80857B8 dec=273402058680
            auipc          a2, -5386
            ld             a2, -1812(a2)
            jalr           a2		// System.RuntimeType:get_IsGenericType():bool:this
            sext.w         a0, a0
            beqz           a0, G_M000_IG14
            lui            a0, -45039
            addiw          a0, a0, -1289
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003FA80857B8 dec=273402058680
            auipc          a1, -5386
            ld             a1, -1768(a1)
            jalr           a1		// System.RuntimeType:GetGenericTypeDefinition():System.Type:this
            lui            a1, -22520
            addiw          a1, a1, 1419
            slli           a1, a1, 30
            srli           a1, a1, 26		;; load imm: hex=0x0000003FA80858B0 dec=273402058928
            bne            a0, a1, G_M000_IG14
            beqz           s2, G_M000_IG03
            bnez           s3, G_M000_IG05
 
G_M000_IG03:                ;; offset=0x0090
            lw             a1, -4(fp)
            sext.w         a0, a1
            lw             a3, -8(fp)
            sext.w         a2, a3
            slt            a0, a0, a2
            sext.w         a2, a1
            sext.w         a4, a3
            slt            a2, a4, a2
            addi           a4, zero, -1
            czero.nez      a5, a2, a0
            czero.eqz      s1, a4, a0
            or             s1, s1, a5
            auipc          s4, -61
            addi           s4, s4, -1110
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 1548(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            sext.w         a0, s1
            sltiu          s2, a0, 1
            lw             a1, -4(fp)
            sw             a1, 8(s3)
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 1516(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a3, -8(fp)
            sw             a3, 8(s1)
            lui            a0, -103547
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F35C2A9D8 dec=271484889560
            auipc          ra, 515894
            jalr           ra, 1480(ra)		// CORINFO_HELP_NEWSFAST
            sb             s2, 40(a0)
            addi           t3, a0, 24
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 1240(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s1
            auipc          ra, -5413
            jalr           ra, 1224(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
 
G_M000_IG04:                ;; offset=0x014A
            j              G_M000_IG15
 
G_M000_IG05:                ;; offset=0x014E
            ld             a0, 8(s1)
            fence          3, 3
            ld             a1, 8(a0)
            bnez           a1, G_M000_IG12
 
G_M000_IG06:                ;; offset=0x015E
            ld             s4, 24(a0)
 
G_M000_IG07:                ;; offset=0x0162
            ld             a0, 8(s1)
            fence          3, 3
            ld             a1, 8(a0)
            bnez           a1, G_M000_IG13
 
G_M000_IG08:                ;; offset=0x0172
            ld             s1, 24(a0)
 
G_M000_IG09:                ;; offset=0x0176
            fence          3, 3
            auipc          a0, 184
            lw             a0, -946(a0)
            andi           a0, a0, 1
            sext.w         a0, a0
            beqz           a0, G_M000_IG16
 
G_M000_IG10:                ;; offset=0x018E
            lui            a3, 14
            addiw          a3, a3, -623
            slli           a3, a3, 22		;; load imm: hex=0x0000003764400000 dec=237905117184
            ld             a3, 408(a3)
            sub            a3, s1, a3
            sltiu          a3, a3, 1
            mv             a1, s3
            mv             a2, s4
            mv             a0, s2
            auipc          a4, -71
            ld             a4, 270(a4)
 
G_M000_IG11:                ;; offset=0x01BA
            ld             s4, 56(sp)
            ld             s3, 48(sp)
            ld             s2, 40(sp)
            ld             s1, 32(sp)
            ld             ra, 24(sp)
            ld             fp, 16(sp)
            addi           sp, sp, 64
            jr             a4		// Xunit.Sdk.CollectionTracker:AreCollectionsEqual(Xunit.Sdk.CollectionTracker,Xunit.Sdk.CollectionTracker,System.Collections.IEqualityComparer,bool):Xunit.Sdk.AssertEqualityResult
 
G_M000_IG12:                ;; offset=0x01DA
            auipc          a1, -71
            ld             a1, 166(a1)
            jalr           a1		// System.Lazy`1[System.__Canon]:CreateValue():System.__Canon:this
            mv             s4, a0
            j              G_M000_IG07
 
G_M000_IG13:                ;; offset=0x01EE
            auipc          a1, -71
            ld             a1, 146(a1)
            jalr           a1		// System.Lazy`1[System.__Canon]:CreateValue():System.__Canon:this
            mv             s1, a0
            j              G_M000_IG09
 
G_M000_IG14:                ;; offset=0x0202
            auipc          s4, -61
            addi           s4, s4, -1434
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 1224(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a1, -4(fp)
            lw             a3, -8(fp)
            subw           a0, a1, a3
            sltiu          s2, a0, 1
            sw             a1, 8(s1)
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 1188(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            lw             a3, -8(fp)
            sw             a3, 8(s3)
            lui            a0, -103547
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F35C2A9D8 dec=271484889560
            auipc          ra, 515894
            jalr           ra, 1152(ra)		// CORINFO_HELP_NEWSFAST
            sb             s2, 40(a0)
            addi           t3, a0, 24
            mv             t4, s1
            auipc          ra, -5413
            jalr           ra, 912(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 896(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
 
G_M000_IG15:                ;; offset=0x0292
            ld             s4, 56(sp)
            ld             s3, 48(sp)
            ld             s2, 40(sp)
            ld             s1, 32(sp)
            ld             ra, 24(sp)
            ld             fp, 16(sp)
            addi           sp, sp, 64
            ret 
G_M000_IG16:                ;; offset=0x02B2
            lui            a0, -51776
            addiw          a0, a0, -911
            slli           a0, a0, 30
            srli           a0, a0, 26		;; load imm: hex=0x0000003F35BFC710 dec=271484700432
            auipc          ra, -4153
            jalr           ra, 1326(ra)		// CORINFO_HELP_GET_GCSTATIC_BASE
            j              G_M000_IG10
 
G_M000_IG17:                ;; offset=0x02CE
            auipc          s4, -61
            addi           s4, s4, -1638
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 1020(ra)		// CORINFO_HELP_NEWSFAST
            mv             s1, a0
            lw             a1, -4(fp)
            sw             a1, 8(s1)
 
G_M000_IG18:                ;; offset=0x02EE
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 996(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a3, -8(fp)
            sw             a3, 8(s2)
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 972(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            mv             a1, s2
            addi           a0, s1, 8
            auipc          a2, -70
            ld             a2, -1086(a2)
            jalr           a2		// System.Int32:CompareTo(System.Object):int:this
            sext.w         a0, a0
            sltiu          s1, a0, 1
            lw             a1, -4(fp)
            sw             a1, 8(s3)
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 920(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a3, -8(fp)
            sw             a3, 8(s2)
            lui            a0, -103547
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F35C2A9D8 dec=271484889560
            auipc          ra, 515894
            jalr           ra, 884(ra)		// CORINFO_HELP_NEWSFAST
            sb             s1, 40(a0)
            addi           t3, a0, 24
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 644(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s2
            auipc          ra, -5413
            jalr           ra, 628(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
            j              G_M000_IG04
 
G_M000_IG19:                ;; offset=0x03A2
            lw             a1, -4(fp)
            lw             a3, -8(fp)
            subw           a0, a1, a3
            sltiu          s1, a0, 1
            auipc          s4, -61
            addi           s4, s4, -1866
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 792(ra)		// CORINFO_HELP_NEWSFAST
            mv             s2, a0
            lw             a1, -4(fp)
            sw             a1, 8(s2)
            mv             a0, s4
            auipc          ra, 515894
            jalr           ra, 768(ra)		// CORINFO_HELP_NEWSFAST
            mv             s3, a0
            lw             a3, -8(fp)
            sw             a3, 8(s3)
            lui            a0, -103547
            addiw          a0, a0, 1339
            slli           a0, a0, 29
            srli           a0, a0, 26		;; load imm: hex=0x0000003F35C2A9D8 dec=271484889560
            auipc          ra, 515894
            jalr           ra, 732(ra)		// CORINFO_HELP_NEWSFAST
            sb             s1, 40(a0)
            addi           t3, a0, 24
            mv             t4, s2
            auipc          ra, -5413
            jalr           ra, 492(ra)		// CORINFO_HELP_ASSIGN_REF
            addi           t3, a0, 32
            mv             t4, s3
            auipc          ra, -5413
            jalr           ra, 476(ra)		// CORINFO_HELP_ASSIGN_REF
            sd             zero, 8(a0)
            sd             zero, 16(a0)
            sd             zero, 44(a0)
            sd             zero, 52(a0)
            j              G_M000_IG15
 
G_M000_IG20:                ;; offset=0x043A
            addi           sp, sp, -64
            sd             fp, 0(sp)
            sd             ra, 8(sp)
            sd             s1, 16(sp)
            sd             s2, 24(sp)
            sd             s3, 32(sp)
            sd             s4, 40(sp)
 
G_M000_IG21:                ;; offset=0x0456
            auipc          a0, 0
            addi           a0, a0, -392
 
G_M000_IG22:                ;; offset=0x045E
            ld             s4, 40(sp)
            ld             s3, 32(sp)
            ld             s2, 24(sp)
            ld             s1, 16(sp)
            ld             ra, 8(sp)
            ld             fp, 0(sp)
            addi           sp, sp, 64
            ret 
G_M000_IG23:                ;; offset=0x047E
            addi           sp, sp, -64
            sd             fp, 0(sp)
            sd             ra, 8(sp)
            sd             s1, 16(sp)
            sd             s2, 24(sp)
            sd             s3, 32(sp)
            sd             s4, 40(sp)
 
G_M000_IG24:                ;; offset=0x049A
            auipc          a0, 0
            addi           a0, a0, -248
 
G_M000_IG25:                ;; offset=0x04A2
            ld             s4, 40(sp)
            ld             s3, 32(sp)
            ld             s2, 24(sp)
            ld             s1, 16(sp)
            ld             ra, 8(sp)
            ld             fp, 0(sp)
            addi           sp, sp, 64
            ret 
; Total bytes of code 1218

@github-actions github-actions Bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label May 30, 2026
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am11 commented May 30, 2026

Shall rebase once #128785 is merged.

@am11 am11 added the arch-riscv Related to the RISC-V architecture label May 30, 2026
@dotnet-policy-service dotnet-policy-service Bot added the community-contribution Indicates that the PR has been added by a community member label May 30, 2026
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
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am11 commented May 30, 2026

cc @tomeksowi, @fuad1502, @dotnet/samsung it's basically "banchless ifconversion" using czero.eqz and czero.nez based on https://github.com/riscv/riscv-isa-manual/blob/0d130f270b6442d393c578068849f9c918d14cac/src/unpriv/zicond.adoc#L21.

@am11 am11 force-pushed the feature/riscv64/detect-and-use-zicond branch from 5cbff40 to 9a95b64 Compare May 30, 2026 13:27
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Looks good, some improvements

Comment thread src/coreclr/jit/ifconversion.cpp
Comment thread src/coreclr/jit/lowerriscv64.cpp Outdated
Comment thread src/coreclr/jit/lowerriscv64.cpp Outdated
Comment thread src/coreclr/jit/lowerriscv64.cpp Outdated
Comment thread src/coreclr/jit/codegenriscv64.cpp Outdated
Comment thread src/coreclr/jit/lsrariscv64.cpp Outdated
Comment thread src/coreclr/jit/lowerriscv64.cpp
Comment thread src/coreclr/jit/codegenriscv64.cpp Outdated
Comment thread src/coreclr/jit/lowerriscv64.cpp Outdated
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            lw             a1, -4(fp)
            sext.w         a0, a1
            lw             a3, -8(fp)
            sext.w         a2, a3
            slt            a0, a0, a2
            sext.w         a2, a1
            sext.w         a4, a3
            slt            a2, a4, a2
            addi           a4, zero, -1
            czero.nez      a5, a2, a0
            czero.eqz      s1, a4, a0
            or             s1, s1, a5

btw, looks like it's doing something like

    int cmp;
    if (a < b) cmp = -1;
    else if (a > b) cmp = 1;
    else cmp = 0;

which is probably better translated as cmp = (a > b) - (a < b) (two slts and a sub)

But that's neither here nor there for this PR, "booleans as integers" optimizations are very rudimentary rn on RISC-V.

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am11 commented May 31, 2026

But that's neither here nor there for this PR, "booleans as integers" optimizations are very rudimentary rn on RISC-V.

Agreed, this is a generic morph-level fold (boolean-as-integer). Will track separately.

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