SERCOM async/DMA with SAME5x support - #395
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…in a multi-master configuration
…erving legacy behavior.
…added stopTransmissionWIRE to allow sync closeout, handle errors and continue processing the transaction queue
…g ISR called APIs
…or pin assignment validation
- Fix misleading indentation in retry logic (lines 847, 857) - Remove ambiguous overload for Wire.begin() with integer literals (uint16_t version now requires explicit enableGeneralCall parameter) - Remove unused variable in SPI.cpp - Remove redundant unsigned < 0 check in setPending()
- Add __attribute__((weak)) to all SPI interrupt handlers (SERCOM4, SPI1, etc) This allows variants to override them when SERCOM is used for other peripherals (e.g., MKR variants use SERCOM4 for Serial2/UART) - Explicitly cast slave addresses to uint8_t in Wire examples to avoid any potential overload resolution issues on different compiler versions
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Summary
This replaces #385. The original PR remains available for its discussion and history, but its
sercom-async-dmahead diverged before the SAME5x integration work. This replacement allows CI and review to run against the branch containing the SAME5x integration without rewriting the old public branch.Validation
Automated validation
Hardware validation
Dependencies
08e7e9cd22ad5dcd5465536caa6f0b200eb1248625e92a0811b364a068989c43788727c18803fc77