fix spi for esp#941
Merged
Grazfather merged 2 commits intoZigEmbeddedGroup:mainfrom Apr 30, 2026
Merged
Conversation
change that clock_pin connects to the right signal (fspiclk instead of spiclk) fix the fifo_fill function so that the rest bytes when the length of the message is not divisible by 4 get also transmitted
tact1m4n3
approved these changes
Apr 29, 2026
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
3 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
change that clock_pin connects to the right signal (fspiclk instead of spiclk)
fix the fifo_fill function so that the rest bytes when the length of the message is not divisible by 4 get also transmitted