grt/cugr: improve via demand calculation#10802
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Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
…op dead field Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
…er default Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
…king Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
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| lo_dx = r.dx(); | ||
| lo_dy = r.dy(); | ||
| } else if (box->getTechLayer() == upper_tl) { | ||
| up_dx = r.dx(); | ||
| up_dy = r.dy(); |
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Accumulate via metal extents across all boxes
When the selected tech via has more than one RECT on a routing layer, this loop overwrites lo_dx/lo_dy or up_dx/up_dy with whichever dbBox is visited last. That makes the new via-demand model charge a single rectangle rather than the via's full routing-layer footprint, so compound/default vias can have congestion and cost under-reported in a way that depends on box order. Please union/accumulate the routing-layer bbox before calling viaDemandLength.
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We would support such a non-standard via.
Do you want to use ceil? You can't really partially block a track. |
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>
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@codex review |
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| const std::tuple<bool, bool, int, int64_t> key{ | ||
| !or_default, !via->isDefault(), cuts, enc_area}; |
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Prefer single-cut vias before LEF defaults
When a layer has both a LEF DEFAULT multi-cut via and any single-cut via, this tuple selects the default multi-cut via because !via->isDefault() is ranked before cuts. I checked DRT's initDefaultVias in src/drt/src/io/io_parser_helper.cpp:95-106: it groups candidates by cut count and always chooses from the 1-cut group when available, with getViaRawPriority only ordering inside that group. In that scenario CUGR now charges congestion for a different footprint than detailed routing will use, which can push routes away from vias DRT would actually place.
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Summary
CUGR previously modeled a via's global-routing demand as a min-area-derived stub length inflated by a flat
via_multiplier = 2.0— a proxy with no perpendicular (track-blocking) term. This replaces it with a model built from the via's real enclosure geometry read from the tech:demand = (enclosure_along / gcell) * ((enclosure_perp + 2*spacing) / pitch)i.e. "how much of a track's length the pad spans" times "how many tracks it blocks across." This removes the magic
via_multiplieron the geometry path and better approximates the resource a via consumes at detailed routing. The viageometry is extracted once in
Design;GridGraphconsumes the digested per-layer demand.Also included:
Type of Change
Impact
Affects CUGR only (
global_route -use_cugr); the default FastRoute path is unchanged. Via-demand magnitudes change per layer, which shifts CUGR routing, congestion, and guides: neutral on uncongested designs, improved on realistically congested designs (lower reported overflow and wirelength, e.g. aes-class designs 58->27 and 101->42 overflow with shorter wirelength), and higher reported congestion only on an extreme 90%-capacity stress test (the model correctly charging fat upper-metal vias under starvation; RRR still converges). Resistance-aware timing is preserved. A new warning (GRT-173) is emitted for techs with no via for a routing-layer pair. All CUGR test goldens were regenerated.Verification
./etc/Build.sh).Related Issues
N/A