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[AMD][MI35X] Bump qwen3.5-mxfp4 MI355X SGLang single-node image to v0.5.16 #2433

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[AMD][MI35X] Bump qwen3.5-mxfp4 MI355X SGLang single-node image to v0.5.16 #2433

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[AMD][MI35X] Bump qwen3.5-mxfp4 MI355X SGLang single-node image to v0…
yichiche Jul 31, 2026
760e7d3
[AMD][MI35X] Point qwen3.5-mxfp4 changelog entry to PR #2433
yichiche Jul 31, 2026
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4 changes: 2 additions & 2 deletions configs/amd-master.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -366,7 +366,7 @@ qwen3.5-fp8-mi355x-sglang-disagg:
- "DECODE_MTP_SIZE=0"

qwen3.5-fp4-mi355x-sglang:
image: lmsysorg/sglang-rocm:v0.5.15-rocm720-mi35x-20260713
image: lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260730
model: amd/Qwen3.5-397B-A17B-MXFP4
model-prefix: qwen3.5
runner: mi355x
Expand Down Expand Up @@ -398,7 +398,7 @@ qwen3.5-fp4-mi355x-atom:
- { tp: 4, conc-start: 4, conc-end: 16 }

qwen3.5-fp4-mi355x-sglang-mtp:
image: lmsysorg/sglang-rocm:v0.5.15-rocm720-mi35x-20260713
image: lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260730
model: amd/Qwen3.5-397B-A17B-MXFP4
model-prefix: qwen3.5
runner: mi355x
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7 changes: 7 additions & 0 deletions perf-changelog.yaml
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Expand Up @@ -5355,3 +5355,10 @@
- "Apply the accuracy-gated Kimi-K2.5 MXFP4 settings: tuned AITER MXFP4 MoE, fused shared experts, FP8 KV cache, block size 16, 16384 batched tokens, 512 sequences, async scheduling, gpu-memory-utilization 0.85 (headroom for CUDA-graph capture on MI355X), and the AITER BF16 GEMM path"
- "Extend the TP4 and TP8 8k1k concurrency sweep from 64 to 128 (1k1k deprecated per #2263)"
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2213

- config-keys:
- qwen3.5-fp4-mi355x-sglang
- qwen3.5-fp4-mi355x-sglang-mtp
description:
- "Bump image from lmsysorg/sglang-rocm:v0.5.15-rocm720-mi35x-20260713 to lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260730"
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2433
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