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๐Ÿ”ฌ DigitalLogicsStudio โ€” by SENODROOM

Formerly known as Boolforge โ€” now donated to and maintained by the QuantumLogicsLabs GitHub organization. Live repository: QuantumLogicsLabs/DigitalLogicsStudio

A comprehensive, interactive Digital Logic & Boolean Algebra learning platform built with React 18. From drag-and-drop circuit simulation to K-Map solvers, truth table generators, number system converters, sequential circuit analysis, and a full arithmetic functions suite โ€” DigitalLogicsStudio is a one-stop environment for learning and experimenting with digital logic design.


๐Ÿ›๏ธ Project History

Milestone Details
Original Creator SENODROOM (Muhammad Saad Amin)
Original Name Boolforge
v1.0.0 Initial release โ€” Logic Gate Simulator
v2.0.0 Major bug fixes & Undo/Redo system
Donation Project donated by SENODROOM to QuantumLogicsLabs GitHub organization
New Home QuantumLogicsLabs/DigitalLogicsStudio
Copyright ยฉ 2025 QuantumLogics Incorporated. All Rights Reserved.

โœจ Features

๐ŸŽ›๏ธ Logic Gate Simulator (Boolforge Canvas)

  • ๐ŸŽจ Interactive Canvas โ€” Drag and drop logic gates on a grid-based canvas
  • ๐Ÿ”Œ Wire Connections โ€” Connect gates by clicking output โ†’ input points
  • ๐Ÿ—‘๏ธ Click to Delete Wires โ€” Remove any wire with a single click
  • โ†ถ Undo / Redo โ€” Full history system (up to 50 states)
  • โŒจ๏ธ Keyboard Shortcuts โ€” Fast editing with familiar hotkeys
  • ๐Ÿ“Š Truth Table Generator โ€” Automatically generate circuit truth tables
  • ๐Ÿ’พ Save / Load Circuits โ€” Export and import designs as JSON
  • โšก Live Evaluation โ€” Real-time logic updates with visual feedback
  • ๐ŸŽฏ 10 Logic Gate Types โ€” INPUT, OUTPUT, AND, OR, NOT, NAND, NOR, XOR, XNOR, BUFFER
  • ๐ŸŽฎ Smooth Interactions โ€” Snap-to-grid, animations, glowing active wires

๐Ÿ“š Learning Modules

  • ๐Ÿ“– Boolean Algebra โ€” Laws, identities, duality principle, consensus theorem
  • ๐Ÿ—บ๏ธ K-Map Generator โ€” Interactive Karnaugh Map solver with grouping guide
  • ๐Ÿ“ Minterms & Maxterms โ€” SOP/POS standard forms, minterm/maxterm relations
  • ๐Ÿ”ข Number Systems โ€” Binary, octal, decimal, hex conversions & calculator
  • ๐Ÿงฎ Bit Converter & Extension โ€” Sign extension, bit operations
  • ๐Ÿ”ค ASCII & BCD Notation โ€” Interactive reference pages
  • โฑ๏ธ Time Diagrams โ€” Visual signal timing analysis
  • ๐Ÿ’ก Gate Explanation โ€” In-depth breakdown of all gate types
  • ๐Ÿ” Universal Gates โ€” NAND/NOR universality demonstrations
  • ๐Ÿ“‰ Circuit Cost โ€” Logic minimization and cost analysis
  • ๐ŸŽฒ Odd Functions & Parity โ€” Parity bit calculator and generator

โž• Arithmetic Functions & HDLs

  • Binary Adders โ€” Half adder, full adder, ripple carry, look-ahead carry
  • Binary Subtractor โ€” Half/full subtractors
  • Add/Subtract Unit โ€” Combined binary add-subtractor
  • Binary Multipliers โ€” Array multiplier circuits
  • Complements โ€” 1's and 2's complement calculator
  • Code Conversion โ€” BCD, Gray code, and other conversions
  • Magnitude Comparator โ€” Interactive N-bit comparator
  • Parity Generators โ€” Even/odd parity logic
  • Signed/Unsigned Arithmetic โ€” Overflow detection, sign handling
  • Design Applications โ€” Real-world combinational circuit design

๐Ÿ”€ Encoders & Decoders

  • Encoder Pages โ€” 4-to-2, 8-to-3 priority encoders with interactive simulators
  • Decoder Pages โ€” BCD, 7-segment, function generator demos
  • Cascading Explainer โ€” Multi-level encoder/decoder cascading
  • Minterm Equation Builder โ€” Visual minterm-to-boolean expression tool
  • Signal Flow Diagrams โ€” Animated signal path visualization
  • Comparison Tables โ€” Side-by-side encoder/decoder type comparison
  • Priority Conflict Simulator โ€” Visualize priority encoder conflicts
  • Built-in Quizzes โ€” Test your encoder/decoder knowledge

๐Ÿ”„ Sequential Circuits

  • Latches โ€” SR, D, JK latch simulations
  • Flip-Flops โ€” D, JK, T, SR flip-flop types with timing diagrams
  • State Diagrams โ€” Interactive FSM state diagram builder
  • State Reduction โ€” Minimization of FSM states
  • Sequential Analysis โ€” Analysis of existing sequential circuits
  • Design Procedures โ€” Step-by-step sequential circuit design
  • 7-Segment Display โ€” BCD-to-7seg interactive decoder

๐Ÿ“– Digital Logic Book

  • Built-in reference chapters (Ch1, Ch2) from core DLD curriculum

โŒจ๏ธ Keyboard Shortcuts

Shortcut Action
Ctrl+Z / Cmd+Z Undo last action
Ctrl+Shift+Z / Cmd+Shift+Z Redo action
Ctrl+Y / Cmd+Y Redo action (alternative)
Delete / Backspace Delete selected gate
Escape Cancel wire connection mode

๐Ÿš€ Setup

Prerequisites

  • Node.js 18.x, 20.x, or 22.x
  • npm

Installation & Running

git clone https://github.com/QuantumLogicsLabs/DigitalLogicsStudio.git
cd DigitalLogicsStudio
npm install
npm start

Build for Production

npm run build

Run Tests

npm test

CI/CD

The project uses GitHub Actions with Node.js CI, automatically building and testing across Node 18.x, 20.x, and 22.x on every push and pull request to main.


๐Ÿง  Usage Guide

  1. Add Gates โ€” Use sidebar buttons on the simulator canvas
  2. Move Gates โ€” Drag them around the canvas
  3. Connect Wires โ€” Click an output point, then an input point
  4. Delete Wires โ€” Click directly on a wire
  5. Toggle Inputs โ€” Use input switches to change logic levels
  6. View Outputs โ€” Check the truth table panel
  7. Delete Gates โ€” Right-click a gate
  8. Generate Truth Table โ€” Click "Update Table"
  9. Save Circuit โ€” Export your design as JSON
  10. Load Circuit โ€” Import a previously saved design
  11. Explore Modules โ€” Navigate to learning pages from the Home/Navbar

๐Ÿ—๏ธ Project Structure

DigitalLogicsStudio/
โ”œโ”€โ”€ .github/
โ”‚   โ””โ”€โ”€ workflows/
โ”‚       โ””โ”€โ”€ node.js.yml          # CI/CD pipeline
โ”œโ”€โ”€ public/
โ”‚   โ”œโ”€โ”€ css/styles.css
โ”‚   โ”œโ”€โ”€ index.html
โ”‚   โ”œโ”€โ”€ manifest.json
โ”‚   โ””โ”€โ”€ robots.txt
โ”œโ”€โ”€ scripts/
โ”‚   โ””โ”€โ”€ updateArithmeticPages.js
โ”œโ”€โ”€ src/
โ”‚   โ”œโ”€โ”€ assets/
โ”‚   โ”œโ”€โ”€ components/              # Shared UI components
โ”‚   โ”‚   โ”œโ”€โ”€ CircuitModal.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ ControlPanel.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ KMapDisplay.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ TruthTable.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ WhiteboardAnimation.jsx
โ”‚   โ”‚   โ””โ”€โ”€ ...
โ”‚   โ”œโ”€โ”€ data/
โ”‚   โ”‚   โ””โ”€โ”€ gates.js
โ”‚   โ”œโ”€โ”€ hooks/
โ”‚   โ”‚   โ”œโ”€โ”€ useKMapLogic.js
โ”‚   โ”‚   โ””โ”€โ”€ useSpeechSynthesis.js
โ”‚   โ”œโ”€โ”€ pages/
โ”‚   โ”‚   โ”œโ”€โ”€ ArithmeticFunctionsAndHDLs/  # Full arithmetic suite
โ”‚   โ”‚   โ”œโ”€โ”€ Book/                         # DLD reference chapters
โ”‚   โ”‚   โ”œโ”€โ”€ BooleanAlgebra/
โ”‚   โ”‚   โ”œโ”€โ”€ EncoderAndDecoder/            # Encoder & decoder modules
โ”‚   โ”‚   โ”œโ”€โ”€ Home/                         # Landing page
โ”‚   โ”‚   โ”œโ”€โ”€ SequentialCircuits/           # Latches, flip-flops, FSMs
โ”‚   โ”‚   โ”œโ”€โ”€ Boolforge.jsx                 # Main simulator canvas
โ”‚   โ”‚   โ”œโ”€โ”€ KmapGenerator.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ NumberSystemCalculator.jsx
โ”‚   โ”‚   โ”œโ”€โ”€ TimeDiagrams.jsx
โ”‚   โ”‚   โ””โ”€โ”€ ...                           # 30+ additional learning pages
โ”‚   โ”œโ”€โ”€ utils/
โ”‚   โ”‚   โ”œโ”€โ”€ boolMath.js
โ”‚   โ”‚   โ”œโ”€โ”€ expressionParser.js
โ”‚   โ”‚   โ”œโ”€โ”€ QuineMcCluskey.js
โ”‚   โ”‚   โ””โ”€โ”€ ...
โ”‚   โ”œโ”€โ”€ App.js
โ”‚   โ””โ”€โ”€ index.js
โ”œโ”€โ”€ .gitignore
โ”œโ”€โ”€ LICENSE
โ”œโ”€โ”€ package.json
โ””โ”€โ”€ README.md

โš™๏ธ Technologies

Technology Usage
React 18 Core UI framework
React Router v6 Client-side routing
HTML5 Canvas Logic gate simulation canvas
CSS Grid & Flexbox Layouts
JavaScript ES6+ Logic, utilities
Create React App (react-scripts) Build tooling
GitHub Actions CI/CD (Node 18/20/22)
Font Awesome 7 Icons
Lucide React Additional icons
React Icons Icon library

๐Ÿ“ Changelog

[3.0.0] โ€” 2026 (DigitalLogicsStudio โ€” Post-Donation Release)

๐Ÿ›๏ธ Organizational

โœจ Major Expansion โ€” Full Learning Platform

  • Added Sequential Circuits module: latches, flip-flops (D, JK, T, SR), state diagrams, state reduction, FSM analysis and design procedures
  • Added Arithmetic Functions & HDLs suite: binary adders, subtractors, multipliers, add-subtract units, magnitude comparators, parity generators, signed/unsigned arithmetic, code conversion, design applications
  • Added Encoder & Decoder module: 4-to-2 and 8-to-3 encoders, BCD/7-segment decoders, cascading explainer, minterm equation builder, signal flow diagrams, priority conflict simulator, quizzes
  • Added K-Map Generator with grouping guide and Quine-McCluskey solver
  • Added Boolean Algebra overview: laws, identities, duality, consensus theorem, standard forms
  • Added Number System pages: calculator, converters, BCD, ASCII, bit extension
  • Added DLD Book reference (Ch1 & Ch2)
  • Added Time Diagrams, Circuit Cost, Parity Bit Calculator, Universal Gates, Gate Explanation, Odd Functions pages
  • Added useSpeechSynthesis hook for accessibility
  • Integrated Font Awesome 7 and Lucide React icon libraries
  • Added GitHub Actions CI/CD pipeline (Node 18/20/22)

๐ŸŽจ Platform Redesign

  • Full Home page with hero section, article section, navbar, and footer
  • Cyberpunk-inspired CSS design system with CSS custom properties

[2.0.0] โ€” 2026-01-30

๐Ÿ› Bug Fixes

  • Fixed broken wires by switching storage from object refs to gate IDs
  • Wires now persist across drag, delete, and load operations
  • Fixed stale closure issues in evaluation logic
  • Enabled canvas pointer events for wire deletion
  • Fixed connection point active state visuals
  • Corrected useCallback dependency arrays

โœจ New Features

  • Undo/Redo system with 50-state history
  • Keyboard shortcuts for undo, redo, delete, cancel
  • Click-to-delete wires
  • Visual undo/redo buttons
  • Improved sidebar instructions

๐ŸŽจ Improvements

  • Better immutable state management
  • Performance optimizations
  • Improved wire deletion UX
  • Clearer visual history feedback

[1.0.0] โ€” Initial Release

  • Drag-and-drop logic gate canvas
  • 10 gate types (INPUT, OUTPUT, AND, OR, NOT, NAND, NOR, XOR, XNOR, BUFFER)
  • Wire connections with real-time evaluation
  • Truth table generation
  • Circuit save/load (JSON)
  • Cyberpunk UI theme with animated glowing wires
  • Stats panel
  • Right-click gate deletion

๐Ÿ“„ License

Proprietary License โ€” Copyright ยฉ 2025 QuantumLogics Incorporated. All Rights Reserved.

This project is the exclusive proprietary property of QuantumLogics Incorporated. Unauthorized use, reproduction, modification, or distribution is strictly prohibited.

For permissions, contact: legal@quantumlogics.com


๐Ÿ™Œ Credits

Role Person / Entity
Original Creator & Developer SENODROOM (Muhammad Saad Amin)
Project Donor SENODROOM โ†’ QuantumLogicsLabs
Current Maintainer QuantumLogicsLabs
Original Concept Boolforge โ€” Logic Gate Simulator

About

A professional logic gate simulator built with React, featuring drag-and-drop gates, wire connections, real-time evaluation, truth table generation, and circuit save/load.

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