Skip to content

[docs][libcpu][arm][cortex-a] correct TLBIALL comments in start_gcc.S #11309

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
Rbb666 merged 1 commit into from
Apr 3, 2026
Merged

[docs][libcpu][arm][cortex-a] correct TLBIALL comments in start_gcc.S #11309

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions libcpu/arm/cortex-a/start_gcc.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@ continue_exit:

/* invalidate TLB, I-cache and branch predictor */
mov r0, #0
mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */
mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */
mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */
mcr p15, 0, r0, c7, c5, 6 /* BPIALL */
dsb
Expand Down Expand Up @@ -268,7 +268,7 @@ enable_mmu_page_table_early:

/* invalidate TLB, I-cache and branch predictor */
mov r0, #0
mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */
mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */
mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */
mcr p15, 0, r0, c7, c5, 6 /* BPIALL */

Expand Down Expand Up @@ -660,7 +660,7 @@ rt_hw_mmu_switch:

/* invalidate TLB, I-cache and branch predictor */
mov r0, #0
mcr p15, 0, r0, c8, c7, 0 /* ITLBIALL */
mcr p15, 0, r0, c8, c7, 0 /* TLBIALL */
mcr p15, 0, r0, c7, c5, 0 /* ICIALLU */
mcr p15, 0, r0, c7, c5, 6 /* BPIALL */

Expand Down
Loading