Add RTL8812EU / RTL8822EU (rtl8822e) support#124
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Add the generated rtl8822e BB/AGC/RF phy tables, the halrf RF-cal/thermal-track
tables, and the firmware blob for RTL8812EU/RTL8822EU, plus the tooling that
produces them from the upstream aircrack-ng/rtl88x2eu tree:
- hal/phydm/rtl8822e/Hal8822e_PhyTables.{c,h}, halhwimg8822e_bb.c — BB/AGC/RF.
- hal/phydm/halrf/rtl8822e/halhwimg8822e_rf.c — RF-cal + txpowertrack swing
tables + txpwr_lmt.
- hal/hal8822e_fw.{c,h} — 8822e firmware image.
- tools/extract_8822c_phy_tables.py generalized to emit both 8822c and 8822e
tables; tools/extract_8822e_fw.py for the FW blob.
- hal/phydm/rtl8822c/* regenerated by the generalized extractor (no data change).
Edit the generators, not the generated output.
Add the second Jaguar3 generation (rtl8822e: RTL8812EU/RTL8822EU, 0bda:a81a) beside the existing rtl8822c, sharing one HAL core via per-generation strategies. The chip is resolved at construction from the SYS_CFG2 chip-id and USB PID. Shared core (renamed to generation-neutral names): HalJaguar3, HalmacJaguar3Fw, HalmacJaguar3MacInit/Regs, PhyTableLoaderJaguar3, FrameParserJaguar3, RadioManagementJaguar3. Per-generation behind two strategy interfaces — Jaguar3PhyTables (Phy8822cTables / Phy8822eTables) and Jaguar3Calibration (Halrf8822c / Halrf8822e) — selected by ChipVariant. 8822e bring-up + RX: HalMAC-style power-on, verbatim firmware download, MAC/USB config, BB/AGC/RF table apply, RX-DMA aggregation, RF-into-RX-mode enable, and the phydm_rfe_8822e RFE/PAPE pin config. 8822e calibration (Halrf8822e): DACK (AFE S0/S1 banks), per-path IQK (TXK/RXK, LOK, CFIR backup/reload), TXGAPK, and thermal TX-power tracking (RF thermal meter vs efuse baseline -> per-band swing index -> 0x18a0/0x41a0) that holds power flat as the PA heats. DPK is force-bypassed for RFE type 21/22, matching the vendor. 8822e TX + TX-power parity with the kernel driver (validated by usbmon register-diff, per path and per channel): - Working 8822E efuse (OTP) access: V1 addressing + OTP burst mode + the 2-byte packed-header decode; PA-bias (kfree) trim. - RFE GPIO pin-mux so the PA-enable/antenna pins are driven (fixes weak cold TX). - Per-channel/per-path TXAGC reference from the efuse power-by-rate base + BW20 differential; phy_reg_pg per-rate diff table; 5 GHz band TX scaling/shaping. - Byte-matched data-frame TX descriptor; SetTxMode (legacy/HT/VHT rate control). WiFi-only coex/antenna init and a coex runtime thread (drain C2H, re-assert the WL antenna, FW heartbeats, thermal tracking) keep 5 GHz TX alive. Debug/observability env vars retained (efuse/gain-table dumps, calibration bypass gates) for field diagnostics.
Add on-air / register-level bench tooling used to validate the rtl8822e port against the vendor kernel driver: - eu_txagc_regdiff.sh + decode_txagc.py — usbmon capture + per-path TXAGC reference decode (kernel vs devourer). - eu_5g_cold_repeat.sh — VBUS-power-cycled cold TX A/B (honest independent samples), plus TX-power probe/AB and RX-validation scripts. - kernel_tx_inject.py / kernel_tx_bench.sh — vendor-driver on-air TX baseline. - rail_check.sh — USB rail-sag pre-flight guard; wire the EU DUT into regress.py.
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rtl8822e added to the hardware landscape and the on-air TX matrix (tests/bench_onair.py, MCS7/20 MHz): RTL8812EU (LB-LINK BL-M8812EU2, 0bda:a81a): 2.4 GHz 8, ch36 51, ch149 47 Mbps.
Reflect the current state: rtl8822e (RTL8812EU/8822EU) is a supported Jaguar3 generation beside rtl8822c; SYS_CFG2 chip-id dispatch; the generation-neutral module names and the Jaguar3PhyTables/Jaguar3Calibration strategy interfaces.
Remove the "5 GHz TX browns out on a bus-powered rail / on-air power collapses" assertions from the bench guidance; keep the measurement discipline (one clean SDR read per session, full-vs-fast control, register parity when on-air is noisy) stated without the unverified USB-power cause.
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Remove test-environment-specific phrasing from shipped code and docs:
ChipVariant.h ("if the bench ever proves it … currently verified" → state the
fact), svc_tx_demo ("bench witness" → "a receiver"), and the README support
matrix ("no unit on the bench" → "not benchmarked").
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Adds the second Jaguar3 generation — rtl8822e (RTL8812EU / RTL8822EU,
0bda:a81a) — alongside the existing rtl8822c, sharing one HAL core through per-generation strategies. Validated on real hardware (BL-M8812EU2): RX, on-air 5 GHz TX, and TX-power parity with the vendor kernel driver (rtl88x2eu).Architecture
Chip identity resolves at construction from the
SYS_CFG2chip-id + USB PID. The Jaguar3 shared core is renamed to generation-neutral names (HalJaguar3,HalmacJaguar3*,PhyTableLoaderJaguar3,FrameParserJaguar3,RadioManagementJaguar3); per-generation behaviour sits behind two strategy interfaces selected byChipVariant:Jaguar3PhyTables→Phy8822cTables/Phy8822eTablesJaguar3Calibration→Halrf8822c/Halrf8822eThe rtl8822c path is unchanged (CU RX + on-air TX behaviour preserved); Jaguar-1 is untouched. All 8822e-specific behaviour is gated on
ChipVariant::C8822E.What's included
Halrf8822e): DACK (AFE S0/S1), per-path IQK (TXK/RXK, LOK, CFIR reload), TXGAPK, thermal TX-power tracking (holds power flat as the PA heats), and DPK force-bypass for RFE type 21/22 (matching the vendor).SetTxModerate control (legacy/HT/VHT).Validation
0bda:a81a).0x18e8=0x4b/0x41e8=0x54, ch1490x44/0x41) via usbmon capture.Debug/observability env vars (efuse/gain-table dumps, calibration-bypass gates) are retained for field diagnostics.
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