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Merge pull request #16 from bitcoin3us/feat/dsi-bus
ESP32-P4: DSIBus (MIPI-DSI video mode, PPA rotation) and two builder fixes
2 parents 202638f + 145be62 commit 276aec7

6 files changed

Lines changed: 520 additions & 110 deletions

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diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
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index e3b1b81..6ec1f26 100644
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--- a/ports/esp32/esp32_common.cmake
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+++ b/ports/esp32/esp32_common.cmake
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@@ -311,6 +311,15 @@ endforeach()
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# Include the main MicroPython cmake rules.
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include(${MICROPY_DIR}/py/mkrules.cmake)
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+if(CONFIG_IDF_TARGET_ARCH_RISCV AND MICROPY_FROZEN_CONTENT)
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+ # Frozen native code is emitted as byte arrays in a code section with a
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+ # 4-byte alignment (tools/mpy-tool.py). With linker relaxation on, the
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+ # assembler pads that alignment with R_RISCV_ALIGN NOPs, which cannot
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+ # cover odd sizes ("can't relax section"); the file holds no code that
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+ # could be relaxed, so assemble it without relaxation.
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+ set_source_files_properties(${MICROPY_FROZEN_CONTENT} PROPERTIES COMPILE_OPTIONS "-mno-relax")
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+endif()
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+
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# Generate source files for named pins (requires mkrules.cmake for MICROPY_GENHDR_DIR).
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set(GEN_PINS_PREFIX "${MICROPY_PORT_DIR}/boards/pins_prefix.c")
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diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
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index 67e2cbf..a61b0cc 100644
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--- a/tools/mpy-tool.py
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+++ b/tools/mpy-tool.py
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@@ -1254,13 +1254,19 @@ class RawCodeNative(RawCode):
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MP_NATIVE_ARCH_ARMV6,
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MP_NATIVE_ARCH_XTENSA,
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MP_NATIVE_ARCH_XTENSAWIN,
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+ MP_NATIVE_ARCH_RV32IMC,
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+ MP_NATIVE_ARCH_RV64IMC,
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):
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- # ARMV6 or Xtensa -- four byte align.
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+ # ARMV6, Xtensa or RISC-V -- four byte align. RISC-V needs only two,
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+ # but the assembler never pads a 2-byte alignment inside a code
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+ # section, so arrays after an odd-sized one would start at an odd
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+ # address (a 4-byte one is padded once relaxation is off, see
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+ # ports/esp32/esp32_common.cmake).
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self.fun_data_attributes += " __attribute__ ((aligned (4)))"
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elif (
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MP_NATIVE_ARCH_ARMV6M <= config.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP
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- ) or MP_NATIVE_ARCH_RV32IMC <= config.native_arch <= MP_NATIVE_ARCH_RV64IMC:
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- # ARMVxxM or RV{32,64}IMC -- two byte align.
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+ ):
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+ # ARMVxxM -- two byte align.
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self.fun_data_attributes += " __attribute__ ((aligned (2)))"
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def disassemble(self):

‎esp32_user_c_modules_abspath.patch‎

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diff --git a/builder/esp32.py b/builder/esp32.py
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index 3f5fd15..bfc442d 100644
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--- a/builder/esp32.py
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+++ b/builder/esp32.py
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@@ -612,7 +612,9 @@ def build_commands(_, extra_args, script_dir, lv_cflags, ___):
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f'LV_CFLAGS="{lv_cflags}"',
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f'LV_PORT=esp32',
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f'BOARD={board}',
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- 'USER_C_MODULES=../../../../../ext_mod/micropython.cmake'
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+ # absolute: the relative form resolves against lib/micropython's real
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+ # location, which is a different tree when lib/ is symlinked (git worktrees)
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+ f'USER_C_MODULES={SCRIPT_DIR}/ext_mod/micropython.cmake'
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])
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# esp_cmd.extend(extra_args)

‎ext_mod/lcd_bus/esp32_include/dsi_bus.h‎

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// esp-idf includes
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#include "esp_lcd_panel_io.h"
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#include "esp_lcd_panel_interface.h"
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#include "esp_lcd_panel_io.h"
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#include "esp_lcd_mipi_dsi.h"
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#include "esp_ldo_regulator.h"
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#if SOC_PPA_SUPPORTED
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#include "driver/ppa.h"
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#endif
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typedef struct _mp_lcd_dsi_bus_obj_t {
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// The first members mirror mp_lcd_bus_obj_t (lcd_types.h): the
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// generic bus methods cast to it.
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mp_obj_base_t base;
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mp_obj_t callback;
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void *buf1;
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void *buf2;
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mp_obj_array_t *view1;
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mp_obj_array_t *view2;
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uint32_t buffer_flags;
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bool trans_done;
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esp_lcd_dpi_panel_config_t panel_config;
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uint32_t buffer_size;
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mp_obj_array_t *view1;
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mp_obj_array_t *view2;
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void *transmitting_buf;
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bool panel_started;
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int phy_ldo_channel;
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int phy_ldo_voltage_mv;
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esp_ldo_channel_handle_t phy_ldo_handle;
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// rotation (0/90/180/270 degrees, LVGL's sense): LVGL renders the
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// rotated (logical) picture into its own buffers and every update
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// is rotated into the panel's frame buffers by the PPA
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int rotation;
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uint8_t bpp;
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uint32_t lvgl_width;
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uint32_t lvgl_height;
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uint8_t *panel_fbs[2];
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uint8_t back_fb_index;
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uint32_t fb_size_aligned;
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#if SOC_PPA_SUPPORTED
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ppa_client_handle_t ppa_client;
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#endif
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} mp_lcd_dsi_bus_obj_t;
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