Add build-time patches: absolute USER_C_MODULES, RISC-V frozen native alignment

Two build fixes as .patch files applied by MicroPythonOS's
scripts/build_mpos.sh (see CONTRIBUTING.md), rather than edits to
builder/ in this branch.

esp32_user_c_modules_abspath.patch (apply in this repo's root):
builder/esp32.py passed USER_C_MODULES=../../../../../ext_mod/micropython.cmake,
which CMake resolves against lib/micropython/ports/esp32's real location.
When lib/ is symlinked to another checkout (git worktrees sharing one
MicroPython tree and build directory) that silently compiles the OTHER
checkout's ext_mod. The patch passes the absolute path instead.

esp32_riscv_frozen_native_align.patch (apply in lib/micropython):
frozen @micropython.native / viper functions crashed with an illegal
instruction on their first call on the ESP32-P4. tools/mpy-tool.py
emits their machine code in a code section with aligned(2) for RISC-V,
but the RISC-V assembler never pads a 2-byte alignment inside a code
section, so every array following an odd-sized one starts at an odd
address; jalr clears the low bit and the CPU decodes garbage. A 4-byte
alignment is padded, but only when the file is assembled without
linker relaxation (with relaxation the padding is R_RISCV_ALIGN NOPs,
which fail on odd sizes: "3 bytes required for alignment ... can't
relax section"). So the patch makes mpy-tool.py use aligned(4) for
RV32/RV64, as it already does for Xtensa, and compiles frozen_content.c
with -mno-relax on RISC-V targets. Xtensa builds are unchanged.

Both were previously done by builder/esp32.py code in this PR.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

Author: bitcoin3us

esp32_riscv_frozen_native_align.patch

@@ -0,0 +1,47 @@
+diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake
+index e3b1b81..6ec1f26 100644
+--- a/ports/esp32/esp32_common.cmake
++++ b/ports/esp32/esp32_common.cmake
+@@ -311,6 +311,15 @@ endforeach()
+ # Include the main MicroPython cmake rules.
+ include(${MICROPY_DIR}/py/mkrules.cmake)
+ 
++if(CONFIG_IDF_TARGET_ARCH_RISCV AND MICROPY_FROZEN_CONTENT)
++    # Frozen native code is emitted as byte arrays in a code section with a
++    # 4-byte alignment (tools/mpy-tool.py). With linker relaxation on, the
++    # assembler pads that alignment with R_RISCV_ALIGN NOPs, which cannot
++    # cover odd sizes ("can't relax section"); the file holds no code that
++    # could be relaxed, so assemble it without relaxation.
++    set_source_files_properties(${MICROPY_FROZEN_CONTENT} PROPERTIES COMPILE_OPTIONS "-mno-relax")
++endif()
++
+ # Generate source files for named pins (requires mkrules.cmake for MICROPY_GENHDR_DIR).
+ 
+ set(GEN_PINS_PREFIX "${MICROPY_PORT_DIR}/boards/pins_prefix.c")
+diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py
+index 67e2cbf..a61b0cc 100644
+--- a/tools/mpy-tool.py
++++ b/tools/mpy-tool.py
+@@ -1254,13 +1254,19 @@ class RawCodeNative(RawCode):
+             MP_NATIVE_ARCH_ARMV6,
+             MP_NATIVE_ARCH_XTENSA,
+             MP_NATIVE_ARCH_XTENSAWIN,
++            MP_NATIVE_ARCH_RV32IMC,
++            MP_NATIVE_ARCH_RV64IMC,
+         ):
+-            # ARMV6 or Xtensa -- four byte align.
++            # ARMV6, Xtensa or RISC-V -- four byte align. RISC-V needs only two,
++            # but the assembler never pads a 2-byte alignment inside a code
++            # section, so arrays after an odd-sized one would start at an odd
++            # address (a 4-byte one is padded once relaxation is off, see
++            # ports/esp32/esp32_common.cmake).
+             self.fun_data_attributes += " __attribute__ ((aligned (4)))"
+         elif (
+             MP_NATIVE_ARCH_ARMV6M <= config.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP
+-        ) or MP_NATIVE_ARCH_RV32IMC <= config.native_arch <= MP_NATIVE_ARCH_RV64IMC:
+-            # ARMVxxM or RV{32,64}IMC -- two byte align.
++        ):
++            # ARMVxxM -- two byte align.
+             self.fun_data_attributes += " __attribute__ ((aligned (2)))"
+ 
+     def disassemble(self):

esp32_user_c_modules_abspath.patch

@@ -0,0 +1,15 @@
+diff --git a/builder/esp32.py b/builder/esp32.py
+index 3f5fd15..bfc442d 100644
+--- a/builder/esp32.py
++++ b/builder/esp32.py
+@@ -612,7 +612,9 @@ def build_commands(_, extra_args, script_dir, lv_cflags, ___):
+         f'LV_CFLAGS="{lv_cflags}"',
+         f'LV_PORT=esp32',
+         f'BOARD={board}',
+-        'USER_C_MODULES=../../../../../ext_mod/micropython.cmake'
++        # absolute: the relative form resolves against lib/micropython's real
++        # location, which is a different tree when lib/ is symlinked (git worktrees)
++        f'USER_C_MODULES={SCRIPT_DIR}/ext_mod/micropython.cmake'
+     ])
+ 
+     # esp_cmd.extend(extra_args)