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Add unit tests for kicadtoNgspice Convert module - #624

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caveman210:unit_test_convert
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Add unit tests for kicadtoNgspice Convert module#624
caveman210 wants to merge 1 commit into
FOSSEE:masterfrom
caveman210:unit_test_convert

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Related Issues

Improves test coverage of the KiCad-to-ngspice netlist conversion pipeline by adding automated unit tests for the Convert module. The tests verify source-parameter injection for all six source types, analysis-card generation (AC/TRAN/DC/.op), unit-prefix conversion and device reference lookup, helping detect regressions during future development.

Purpose

The main objective is to lock the current behaviour of the schematic-converter logic: correct rewriting of source lines in the netlist, exact ngspice analysis-card output and SI-prefix handling. A separate known-issues suite pins current defects (e.g. meg misread as milli, ac substring collision in node names, silently swallowed entry-key errors) so they surface explicitly until fixed.

Approach

Created a unittest-based test suite under:
unit_tests/test_convert.py
unit_tests/known_issues/test_convert.py

The following functionality is covered:

  • converttosciform/defaultvalue unit conversion and defaults
  • Source-parameter injection for sine, pulse, pwl, ac, dc and exp sources
  • AC, TRAN, DC and .op analysis-card generation
  • Two-source DC sweep output and empty-field defaults
  • .lib to .xml reference lookup via getReferenceName
  • Known defects pinned in a separate characterisation suite

Related Issues

Improves test coverage of the KiCad-to-ngspice netlist conversion
pipeline by adding automated unit tests for the Convert module. The
tests verify source-parameter injection for all six source types,
analysis-card generation (AC/TRAN/DC/.op), unit-prefix conversion and
device reference lookup, helping detect regressions during future
development.

Purpose

The main objective is to lock the current behaviour of the
schematic-converter logic: correct rewriting of source lines in the
netlist, exact ngspice analysis-card output and SI-prefix handling. A
separate known-issues suite pins current defects (e.g. meg misread as
milli, ac substring collision in node names, silently swallowed
entry-key errors) so they surface explicitly until fixed.

Approach

Created a unittest-based test suite under:
unit_tests/test_convert.py
unit_tests/known_issues/test_convert.py

The following functionality is covered:
- converttosciform/defaultvalue unit conversion and defaults
- Source-parameter injection for sine, pulse, pwl, ac, dc and exp sources
- AC, TRAN, DC and .op analysis-card generation
- Two-source DC sweep output and empty-field defaults
- .lib to .xml reference lookup via getReferenceName
- Known defects pinned in a separate characterisation suite
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