Crt tst

src/crt/i48test.src

@@ -0,0 +1,19 @@
+	.assume	adl=1
+
+	.section	.text
+	.global	__i48test
+	.type	__i48test, @function
+
+__i48test:
+	; Z flag = ((UDE:UHL & UIY:UBC) == 0)
+	; all other flags are destroyed
+	push	hl
+	push	de
+	call	__i48and
+	call	__i48cmpzero
+	pop	de
+	pop	hl
+	ret
+
+	.extern	__i48and
+	.extern	__i48cmpzero

src/crt/lltest.src

@@ -0,0 +1,36 @@
+	.assume	adl=1
+
+	.section	.text
+	.global	__lltest
+	.type	__lltest, @function
+
+__lltest:
+	; Z flag = ((BC:UDE:UHL & SP64) == 0)
+	; all other flags are destroyed
+	; (sp + 18) = [48:63]
+	; (sp + 15) = [24:47]
+	; (sp + 12) = [ 0:23]
+	; (sp +  9) = ret
+	push	bc	; (sp + 6)
+	push	de	; (sp + 3)
+	push	hl	; (sp + 0)
+	ld	hl, 18
+	add	hl, sp
+	ld	bc, (hl)
+	dec	hl
+	dec	hl
+	dec	hl
+	ld	de, (hl)
+	dec	hl
+	dec	hl
+	dec	hl
+	ld	hl, (hl)
+	call	__lland
+	call	__llcmpzero
+	pop	hl
+	pop	de
+	pop	bc
+	ret
+
+	.extern	__lland
+	.extern	__llcmpzero

src/crt/stest.src

@@ -0,0 +1,22 @@
+	.assume	adl=1
+
+	.section	.text
+	.global	__stest
+	.type	__stest, @function
+
+__stest:
+	; Z flag = ((HL & BC) == 0)
+	; all other flags are destroyed
+	push	de
+	ld	e, a
+	; test low 8 bits
+	ld	a, l
+	and	a, c
+	jr	nz, .L.non_zero
+	; test high 8 bits
+	ld	a, h
+	and	a, b
+.L.non_zero:
+	ld	a, e
+	pop	de
+	ret

src/crt/test.src

@@ -0,0 +1,54 @@
+	.assume	adl=1
+
+;-------------------------------------------------------------------------------
+
+	.section	.text
+	.global	__ltest
+	.type	__ltest, @function
+
+__ltest:
+	; Z flag = ((E:UHL & A:UBC) == 0)
+	; all other flags are destroyed
+	tst	a, e
+	ret	nz
+
+; REQUIRE	require	__itest
+
+;-------------------------------------------------------------------------------
+
+; REQUIRE	.section	.text
+	.global	__itest
+	.type	__itest, @function
+
+__itest:
+	; Z flag = ((UHL & UBC) == 0)
+	; all other flags are destroyed
+	push	de
+	ld	e, a
+	; test low 8 bits
+	ld	a, l
+	and	a, c
+	jr	nz, .L.non_zero
+	; test high 8 bits
+	ld	a, h
+	and	a, b
+	jr	nz, .L.non_zero
+	; test upper 8 bits
+	push	hl
+	scf
+	sbc	hl, hl
+	add	hl, sp
+	push	bc
+	ld	a, (hl)
+	inc	hl
+	ld	sp, hl
+	inc	hl
+	inc	hl
+	and	a, (hl)
+	pop	hl
+.L.non_zero:
+	ld	a, e
+	pop	de
+	ret
+
+;-------------------------------------------------------------------------------