simd: U64x8::mul_lo32 — widening lo32×lo32→u64 on every backend (argon2 BlaMka) - #331
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ChangesU64x8 multiplication
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A rabbit checks each lane with care, Comment |
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…n2 BlaMka)
Lane-wise lo32(self) x lo32(rhs) as an exact u64; the high 32 bits of each
input lane are ignored and the product cannot overflow. This is the multiply
in argon2's BlaMka G function (a + b + 2*lo32(a)*lo32(b)) and the limb
multiply of radix-2^26 Poly1305 / curve25519 arithmetic.
AVX-512 _mm512_mul_epu32 (VPMULUDQ zmm). Intrinsic, not portable source:
in BlaMka's add chain LLVM lowered the portable form to VPMULLQ.
AVX2 _mm256_mul_epu32 on each 256-bit half.
NEON vmovn_u64 + vmull_u32 (UMULL) per quad; LLVM left the portable
form scalar inside BlaMka on aarch64.
wasm i32x4_shuffle::<0,2,0,2> + u64x2_extmul_low_u32x4 per v128.
scalar the per-lane reference loop.
nightly (a & 0xFFFFFFFF) * (b & 0xFFFFFFFF) on core::simd::u64x8.
Tests: simd::tests::u64x8_mul_lo32_matches_scalar checks every lane against
the scalar definition with operands whose high halves are all non-zero and
chosen so a full 64-bit multiply differs in every lane (asserted), plus
commutativity and argon2's fBlaMka (RFC 9106 3.5) built from mul_lo32. The
NEON (qemu) and wasm (node) parity harnesses gain the same check as 0x30F.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019HnekoM1EidTwQLS3oFVFm
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_019HnekoM1EidTwQLS3oFVFm
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What this adds
U64x8::mul_lo32(self, rhs)computes, lane by lane,lo32(self) × lo32(rhs)as an exactu64.a + b + 2·lo32(a)·lo32(b), which runs on a live path:ogar-encryptionfor a2ui session keys, and ogar-auth for logins. It's also the limb multiply that radix-2²⁶ Poly1305 and curve25519 arithmetic need._mm512_mul_epu32(VPMULUDQzmm)_mm256_mul_epu32on each 256-bit halfvmovn_u64+vmull_u32(UMULL) per quadi32x4_shuffle::<0,2,0,2>+u64x2_extmul_low_u32x4per v128(a & 0xFFFF_FFFF) * (b & 0xFFFF_FFFF)oncore::simd::u64x8AVX-512 and NEON name the intrinsic rather than relying on portable source. A codegen probe showed that inside BlaMka's add chain, LLVM lowered the portable form to
VPMULLQ(the full 64-bit multiply) on x86-64-v4, and left it as a scalarmaddon aarch64.Tests
simd::tests::u64x8_mul_lo32_matches_scalar:mul_lo32.neon-simd-parity(qemu) andwasm-simd-parity(node) gain the same check, as return code0x30F.Run locally, all green:
scripts/neon-parity.shandscripts/wasm-parity.sh;cargo test --libon native: 2478 passed;-D warningson native and on v3.Disable runs, each one red:
_mm512_mullo_epi64→ the lane 0 assertion fails;vshrn→ rc 783 (0x30F);<1,3,1,3>→ rc 783.Not run locally: the nightly-simd arm; there's no nightly toolchain here, and CI's nightly rows cover it.
Note for reviewers
cargo --config X clippydoes not applyX.clippyis an external subcommand, and cargo doesn't forward a--configgiven before it: rustc ran withtarget-cpu=nativeonly. Usecargo clippy --config X. This is recorded on the blackboard.🤖 Generated with Claude Code
https://claude.ai/code/session_019HnekoM1EidTwQLS3oFVFm
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