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Merge pull request #25 from ijager/full_serial
Support different USART feature sets (Full and Basic) and add FIFO and RTO options
2 parents a085fa8 + 014f10e commit f7b55e9

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8 files changed

+965
-583
lines changed

8 files changed

+965
-583
lines changed

examples/color_sensor.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@ const APP: () = {
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s2: PA9<Output<PushPull>>,
5757
s3: PA7<Output<PushPull>>,
5858
led: PA5<Output<PushPull>>,
59-
uart: Serial<stm32::USART2>,
59+
uart: Serial<stm32::USART2, serial::FullConfig>,
6060
timer: Timer<stm32::TIM16>,
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log_timer: Timer<stm32::TIM17>,
6262
}
@@ -94,7 +94,7 @@ const APP: () = {
9494
let uart = ctx
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.device
9696
.USART2
97-
.usart(tx, rx, serial::Config::default(), &mut rcc)
97+
.usart(tx, rx, serial::FullConfig::default(), &mut rcc)
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.unwrap();
9999

100100
init::LateResources {

examples/sdcard.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ fn main() -> ! {
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3434
let mut uart = dp
3535
.USART2
36-
.usart(gpioa.pa2, gpioa.pa3, serial::Config::default(), &mut rcc)
36+
.usart(gpioa.pa2, gpioa.pa3, serial::FullConfig::default(), &mut rcc)
3737
.unwrap();
3838

3939
let sdmmc_spi = dp.SPI1.spi(

examples/uart-fifo.rs

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
// #![deny(warnings)]
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#![deny(unsafe_code)]
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#![no_main]
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#![no_std]
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6+
extern crate cortex_m_rt as rt;
7+
extern crate panic_halt;
8+
extern crate stm32g0xx_hal as hal;
9+
10+
use core::fmt::Write;
11+
12+
use hal::prelude::*;
13+
use hal::serial::*;
14+
use hal::stm32;
15+
use rt::entry;
16+
17+
#[entry]
18+
fn main() -> ! {
19+
let dp = stm32::Peripherals::take().expect("cannot take peripherals");
20+
let mut rcc = dp.RCC.constrain();
21+
let gpioa = dp.GPIOA.split(&mut rcc);
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23+
let mut usart1 = dp.USART1.usart(
24+
gpioa.pa9,
25+
gpioa.pa10,
26+
FullConfig::default().baudrate(115200.bps())
27+
.fifo_enable()
28+
.rx_fifo_enable_interrupt()
29+
.rx_fifo_threshold(FifoThreshold::FIFO_4_BYTES),
30+
&mut rcc).unwrap();
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32+
33+
writeln!(usart1, "Hello USART1\r\n").unwrap();
34+
35+
let (mut tx1, mut rx1) = usart1.split();
36+
37+
38+
let mut cnt = 0;
39+
loop {
40+
if rx1.fifo_threshold_reached() {
41+
loop {
42+
match rx1.read() {
43+
Err(nb::Error::WouldBlock) => {
44+
// no more data available in fifo
45+
break;
46+
},
47+
Err(nb::Error::Other(_err)) => {
48+
// Handle other error Overrun, Framing, Noise or Parity
49+
},
50+
Ok(byte) => {
51+
writeln!(tx1, "{}: {}\n", cnt, byte).unwrap();
52+
cnt += 1;
53+
},
54+
}
55+
}
56+
}
57+
}
58+
}

examples/uart.rs

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,14 +5,13 @@
55

66
extern crate cortex_m;
77
extern crate cortex_m_rt as rt;
8-
extern crate nb;
98
extern crate panic_halt;
109
extern crate stm32g0xx_hal as hal;
1110

1211
use core::fmt::Write;
1312

1413
use hal::prelude::*;
15-
use hal::serial::Config;
14+
use hal::serial::FullConfig;
1615
use hal::stm32;
1716
use nb::block;
1817
use rt::entry;
@@ -24,7 +23,7 @@ fn main() -> ! {
2423
let gpioa = dp.GPIOA.split(&mut rcc);
2524
let mut usart = dp
2625
.USART2
27-
.usart(gpioa.pa2, gpioa.pa3, Config::default(), &mut rcc)
26+
.usart(gpioa.pa2, gpioa.pa3, FullConfig::default(), &mut rcc)
2827
.unwrap();
2928

3029
writeln!(usart, "Hello\r").unwrap();

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