@@ -288,8 +288,8 @@ impl Rcc {
288
288
289
289
pub ( crate ) fn enable_lse ( & self , bypass : bool ) {
290
290
self . bdcr
291
- . modify ( |_, w| w. lseon ( ) . set_bit ( ) . lsebyp ( ) . bit ( bypass) ) ;
292
- while self . bdcr . read ( ) . lserdy ( ) . bit_is_clear ( ) { }
291
+ . modify ( |_, w| w. lseon ( ) . bit ( !bypass ) . lsebyp ( ) . bit ( bypass) ) ;
292
+ while !bypass && self . bdcr . read ( ) . lserdy ( ) . bit_is_clear ( ) { }
293
293
}
294
294
295
295
pub ( crate ) fn enable_lsi ( & self ) {
@@ -305,34 +305,18 @@ impl Rcc {
305
305
}
306
306
307
307
pub ( crate ) fn enable_rtc ( & self , src : RTCSrc ) {
308
- let rtc_sel = match src {
309
- RTCSrc :: LSE => {
310
- self . enable_lse ( false ) ;
311
- 0b01
312
- }
313
- RTCSrc :: LSE_BYPASS => {
314
- self . enable_lse ( true ) ;
315
- 0b01
316
- }
317
- RTCSrc :: LSI => {
318
- self . enable_lsi ( ) ;
319
- 0b10
320
- }
321
- RTCSrc :: HSE => {
322
- self . enable_hse ( false ) ;
323
- 0b11
324
- }
325
- RTCSrc :: HSE_BYPASS => {
326
- self . enable_hse ( true ) ;
327
- 0b11
328
- }
329
- } ;
330
-
308
+ self . unlock_rtc ( ) ;
331
309
self . apbenr1
332
310
. modify ( |_, w| w. rtcapben ( ) . set_bit ( ) . pwren ( ) . set_bit ( ) ) ;
333
311
self . apbsmenr1 . modify ( |_, w| w. rtcapbsmen ( ) . set_bit ( ) ) ;
334
- self . unlock_rtc ( ) ;
335
312
self . bdcr . modify ( |_, w| w. bdrst ( ) . set_bit ( ) ) ;
313
+
314
+ let rtc_sel = match src {
315
+ RTCSrc :: LSE | RTCSrc :: LSE_BYPASS => 0b01 ,
316
+ RTCSrc :: LSI => 0b10 ,
317
+ RTCSrc :: HSE | RTCSrc :: HSE_BYPASS => 0b11 ,
318
+ } ;
319
+
336
320
self . bdcr . modify ( |_, w| unsafe {
337
321
w. rtcsel ( )
338
322
. bits ( rtc_sel)
@@ -341,6 +325,15 @@ impl Rcc {
341
325
. bdrst ( )
342
326
. clear_bit ( )
343
327
} ) ;
328
+
329
+ self . unlock_rtc ( ) ;
330
+ match src {
331
+ RTCSrc :: LSE => self . enable_lse ( false ) ,
332
+ RTCSrc :: LSE_BYPASS => self . enable_lse ( true ) ,
333
+ RTCSrc :: LSI => self . enable_lsi ( ) ,
334
+ RTCSrc :: HSE => self . enable_hse ( false ) ,
335
+ RTCSrc :: HSE_BYPASS => self . enable_hse ( true ) ,
336
+ } ;
344
337
}
345
338
}
346
339
0 commit comments