From 1653bc3086bb5a58a5b3b673facad1998257d8af Mon Sep 17 00:00:00 2001 From: Chandrasekaran Swaminathan Date: Mon, 22 Jun 2026 07:04:28 +0000 Subject: [PATCH] Update DTS file Signed-off-by: Chandrasekaran Swaminathan --- patches-sonic/nexthop-b27-dts.patch | 636 ++++++---------------------- 1 file changed, 118 insertions(+), 518 deletions(-) diff --git a/patches-sonic/nexthop-b27-dts.patch b/patches-sonic/nexthop-b27-dts.patch index eef9956a7..1fde5c40c 100644 --- a/patches-sonic/nexthop-b27-dts.patch +++ b/patches-sonic/nexthop-b27-dts.patch @@ -1,6 +1,6 @@ -From 2946f3e160d0f7190b6cf4bf27e3bc7a9ff887ee Mon Sep 17 00:00:00 2001 +From b08258664a6e45fb4c03f53bc74e29227a5dfcf3 Mon Sep 17 00:00:00 2001 From: NextHop Build System -Date: Thu, 26 Feb 2026 08:50:56 +0000 +Date: Tue, 2 Jun 2026 15:07:24 +0000 Subject: [PATCH] Add NextHop B27 R0 device tree This adds nexthop-b27-r0.dts for NextHop B27 R0 hardware. @@ -14,12 +14,12 @@ The device tree is based on ast2700-evb.dts with modifications for production hardware that does not have PHY chips. --- arch/arm64/boot/dts/aspeed/Makefile | 1 + - arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts | 938 ++++++++++++++++++ - 2 files changed, 939 insertions(+) + arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts | 538 ++++++++++++++++++ + 2 files changed, 539 insertions(+) create mode 100644 arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts diff --git a/arch/arm64/boot/dts/aspeed/Makefile b/arch/arm64/boot/dts/aspeed/Makefile -index 4458a1b..1b26168 100644 +index 7c31f31..3e904b2 100644 --- a/arch/arm64/boot/dts/aspeed/Makefile +++ b/arch/arm64/boot/dts/aspeed/Makefile @@ -2,6 +2,7 @@ @@ -32,10 +32,10 @@ index 4458a1b..1b26168 100644 ast2700-evb-s1.dtb \ diff --git a/arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts b/arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts new file mode 100644 -index 0000000..edad94f +index 0000000..7d1f339 --- /dev/null +++ b/arch/arm64/boot/dts/aspeed/nexthop-b27-r0.dts -@@ -0,0 +1,938 @@ +@@ -0,0 +1,538 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// NextHop AST2700 based B27 R0 Device Tree @@ -45,15 +45,14 @@ index 0000000..edad94f + +#include "aspeed-g7.dtsi" +#include -+#include + +#define PCIE0_EP 0 // 1: EP, 0: RC +#define PCIE1_EP 0 // 1: EP, 0: RC +#define PCIE2_RC 0 // 1: RC, 0: SGMII + +/ { -+ model = "NextHop B27 R0"; -+ compatible = "nexthop,nexthop-b27-r0", "aspeed,ast2700-evb", "aspeed,ast2700"; ++ model = "Nexthop B27 R0"; ++ compatible = "nexthop,nexthop-b27-r0", "aspeed,ast2700"; + + chosen { + stdout-path = &uart12; @@ -77,21 +76,6 @@ index 0000000..edad94f + ranges; + + #include "ast2700-reserved-mem.dtsi" -+#if 0 -+ video_engine_memory0: video0 { -+ size = <0x0 0x02c00000>; -+ alignment = <0x0 0x00100000>; -+ compatible = "shared-dma-pool"; -+ reusable; -+ }; -+ -+ video_engine_memory1: video1{ -+ size = <0x0 0x02c00000>; -+ alignment = <0x0 0x00100000>; -+ compatible = "shared-dma-pool"; -+ reusable; -+ }; -+#endif + gfx_memory: framebuffer { + size = <0x0 0x01000000>; + alignment = <0x0 0x01000000>; @@ -112,89 +96,14 @@ index 0000000..edad94f + compatible = "shared-dma-pool"; + no-map; + }; ++ ++ espi0_mcyc_memory: mcyc0 { ++ size = <0x0 0x01000000>; ++ alignment = <0x0 0x00010000>; ++ compatible = "shared-dma-pool"; ++ reusable; ++ }; + }; -+#if 0 -+ fan0: pwm-fan0 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 0 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan1: pwm-fan1 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 1 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan2: pwm-fan2 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 2 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan3: pwm-fan3 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 3 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan4: pwm-fan4 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 4 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan5: pwm-fan5 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 5 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan6: pwm-fan6 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 6 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan7: pwm-fan7 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 7 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+ -+ fan8: pwm-fan8 { -+ compatible = "pwm-fan"; -+ pwms = <&pwm_tach 8 40000 0>; /* Target freq:25 kHz */ -+ cooling-min-state = <0>; -+ cooling-max-state = <3>; -+ #cooling-cells = <2>; -+ cooling-levels = <0 15 128 255>; -+ }; -+#endif + iio-hwmon { + compatible = "iio-hwmon"; + status = "okay"; @@ -205,129 +114,15 @@ index 0000000..edad94f + }; +}; + -+#if 0 -+&pwm_tach { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default -+ &pinctrl_pwm2_default &pinctrl_pwm3_default -+ &pinctrl_pwm4_default &pinctrl_pwm5_default -+ &pinctrl_pwm6_default &pinctrl_pwm7_default -+ &pinctrl_pwm8_default -+ &pinctrl_tach0_default &pinctrl_tach1_default -+ &pinctrl_tach2_default &pinctrl_tach3_default -+ &pinctrl_tach4_default &pinctrl_tach5_default -+ &pinctrl_tach6_default &pinctrl_tach7_default -+ &pinctrl_tach8_default &pinctrl_tach9_default -+ &pinctrl_tach10_default &pinctrl_tach11_default -+ &pinctrl_tach12_default &pinctrl_tach13_default -+ &pinctrl_tach14_default &pinctrl_tach15_default>; -+ fan-0 { -+ tach-ch = /bits/ 8 <0x0>; -+ }; -+ fan-1 { -+ tach-ch = /bits/ 8 <0x1>; -+ }; -+ fan-2 { -+ tach-ch = /bits/ 8 <0x2>; -+ }; -+ fan-3 { -+ tach-ch = /bits/ 8 <0x3>; -+ }; -+ fan-4 { -+ tach-ch = /bits/ 8 <0x4>; -+ }; -+ fan-5 { -+ tach-ch = /bits/ 8 <0x5>; -+ }; -+ fan-6 { -+ tach-ch = /bits/ 8 <0x6>; -+ }; -+ fan-7 { -+ tach-ch = /bits/ 8 <0x7>; -+ }; -+ fan-8 { -+ tach-ch = /bits/ 8 <0x8>; -+ }; -+ fan-9 { -+ tach-ch = /bits/ 8 <0x9>; -+ }; -+ fan-10 { -+ tach-ch = /bits/ 8 <0xA>; -+ }; -+ fan-11 { -+ tach-ch = /bits/ 8 <0xB>; -+ }; -+ fan-12 { -+ tach-ch = /bits/ 8 <0xC>; -+ }; -+ fan-13 { -+ tach-ch = /bits/ 8 <0xD>; -+ }; -+ fan-14 { -+ tach-ch = /bits/ 8 <0xE>; -+ }; -+ fan-15 { -+ tach-ch = /bits/ 8 <0xF>; -+ }; -+}; -+#endif +&edac { + status = "okay"; +}; + -+&mctp0 { -+ status = "okay"; -+ memory-region = <&mctp0_reserved>; -+}; -+ -+&mctp1 { -+ status = "okay"; -+ memory-region = <&mctp1_reserved>; -+}; -+ -+&mctp2 { -+ status = "okay"; -+ memory-region = <&mctp2_reserved>; -+}; -+ -+#if 0 -+&sgpiom0 { -+ status = "okay"; -+}; -+ -+&sgpiom1 { -+ status = "okay"; -+}; -+#endif + +&jtag1 { + status = "okay"; +}; + -+#if 0 -+&adc0 { -+ aspeed,int-vref-microvolt = <2500000>; -+ status = "okay"; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default -+ &pinctrl_adc2_default &pinctrl_adc3_default -+ &pinctrl_adc4_default &pinctrl_adc5_default -+ &pinctrl_adc6_default &pinctrl_adc7_default>; -+}; -+ -+&adc1 { -+ aspeed,int-vref-microvolt = <2500000>; -+ status = "okay"; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default -+ &pinctrl_adc10_default &pinctrl_adc11_default -+ &pinctrl_adc12_default &pinctrl_adc13_default -+ &pinctrl_adc14_default &pinctrl_adc15_default>; -+}; -+#endif + +&pinctrl0 { + pinctrl_emmcclk_driving: emmcclk-driving { @@ -416,109 +211,72 @@ index 0000000..edad94f + &pinctrl_i3c12_driving &pinctrl_i3c13_driving + &pinctrl_i3c14_driving &pinctrl_i3c15_driving>; + pinctrl-names = "default"; -+}; -+ -+#if 0 -+&i3c0 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x06010000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c1 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c2 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x06012000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c3 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c4 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x06014000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c5 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c6 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x06016000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; + -+&i3c7 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c8 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x06018000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c9 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c10 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x0601A000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c11 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c12 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x0601C000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; -+}; -+ -+&i3c13 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+ -+&i3c14 { -+ initial-role = "target"; -+ pid = <0x000007ec 0x0601E000>; -+ dcr = /bits/ 8 <0xcc>; -+ status = "okay"; ++ gpio-line-names = ++ /*A0-A7*/ "","","","","","","","", ++ /*B0-B7*/ "","","","","","","","", ++ /*C0-C7*/ "","","","","","","","", ++ /*D0-D7*/ "","","","","","","","", ++ /*E0-E7*/ "","bmc_mode","cpe_ctrl","fpga_prog", ++ "eeprom_wp","","","", ++ /*F0-F7*/ "pwr_cyc_req","cpu_alert_l","cpu_rst_l","", ++ "","","","", ++ /*G0-G7*/ "","","","", ++ "tpm_rst_l","tpm_pirq","tpm_gpio_0","tpm_gpio_1", ++ /*H0-H7*/ "tpm_gpio_2","","","","","","","", ++ /*I0-I7*/ "","","","","","","","", ++ /*J0-J7*/ "","","","","","","","", ++ /*K0-K7*/ "","","","","","","","", ++ /*L0-L7*/ "","","","","","","","", ++ /*M0-M7*/ "","","","","","","","", ++ /*N0-N7*/ "","","","","","","","", ++ /*O0-O7*/ "","","","","","","","", ++ /*P0-P7*/ "","","","","","","","", ++ /*Q0-Q7*/ "","","","","","","","emmc_rst", ++ /*R0-R7*/ "","","","","","","","", ++ /*S0-S7*/ "","","","","","","","", ++ /*T0-T7*/ "","","","","","","","", ++ /*U0-U7*/ "","","","","","","","", ++ /*V0-V7*/ "","","","","","","","", ++ /*W0-W7*/ "","","","","","","","", ++ /*X0-X7*/ "","","","","","","","", ++ /*Y0-Y7*/ "","","","","","","","", ++ /*Z0-Z7*/ "","","","","","","","", ++ /*AA0-AA7*/ "","","","","","","","", ++ /*AB0-AB7*/ "","","","","","","","", ++ /*AC0-AC7*/ "","","","","","","",""; ++ ++ /* TODO: Add more GPIOs hogs as needed, rename & add labels for clarity */ ++ cpe-ctrl-hog { ++ gpio-hog; ++ gpios = ; ++ output-low; ++ }; ++ ++ bmc-gpio2-hog { ++ gpio-hog; ++ gpios = ; ++ output-low; ++ }; ++ ++ bmc-gpio3-hog { ++ gpio-hog; ++ gpios = ; ++ input; ++ }; ++ ++ bmc-gpio6-hog { ++ gpio-hog; ++ gpios = ; ++ input; ++ }; +}; + -+&i3c15 { -+ initial-role = "primary"; -+ status = "okay"; -+}; -+#endif + +&uart1 { + status = "okay"; +}; ++ +&uart12 { + status = "okay"; +}; @@ -558,56 +316,45 @@ index 0000000..edad94f +}; + +&spi0 { ++ compatible = "aspeed,ast2700-spi-txrx", "aspeed,ast2700-spi"; + status = "okay"; -+ pinctrl-0 = <&pinctrl_spi0_default &pinctrl_spi0_cs1_default>; ++ pinctrl-0 = <&pinctrl_spi0_default &pinctrl_spi0_quad_default &pinctrl_spi0_cs1_default>; + pinctrl-names = "default"; + -+ flash@0 { ++ spi-aspeed-full-duplex; ++ ++ fpga@0 { + status = "okay"; -+ m25p,fast-read; -+ label = "spi0:0"; -+ spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; ++ compatible = "nh,fpga-spi-bridge"; ++ spi-max-frequency = <16000000>; ++ reg = <0>; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <1>; + }; + + flash@1 { -+ status = "disabled"; -+ m25p,fast-read; -+ label = "spi0:1"; -+ spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; -+ }; -+}; -+ -+#if 0 -+&spi1 { -+ status = "okay"; -+ pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1_cs1_default>; -+ pinctrl-names = "default"; -+ -+ flash@0 { + status = "okay"; ++ compatible = "jedec,spi-nor"; + m25p,fast-read; -+ label = "spi1:0"; ++ reg = <1>; + spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; -+ }; ++ spi-tx-bus-width = <1>; ++ spi-rx-bus-width = <1>; + -+ flash@1 { -+ status = "disabled"; -+ m25p,fast-read; -+ label = "spi1:1"; -+ spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ host_bios@0 { ++ label = "pnor"; ++ reg = <0x0 0x4000000>; // Adjust size (0x4000000 = 64MB) ++ }; ++ }; + }; +}; -+#endif + -+#if 1 ++ +&spi2 { + compatible = "aspeed,ast2700-spi-txrx"; + pinctrl-0 = <&pinctrl_spi2_default>; @@ -621,44 +368,11 @@ index 0000000..edad94f + spi-max-frequency = <25000000>; + reg = <0>; + status = "okay"; -+ }; -+}; -+#else -+&spi2 { -+ compatible = "aspeed,ast2700-spi"; -+ pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2_cs1_default>; -+ pinctrl-names = "default"; -+ status = "okay"; + -+ flash@0 { -+ status = "okay"; -+ reg = < 0 >; -+ compatible = "jedec,spi-nor"; -+ m25p,fast-read; -+ label = "spi2:0"; -+ spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; -+ }; -+ -+ flash@1 { -+ status = "okay"; -+ reg = < 1 >; -+ compatible = "jedec,spi-nor"; -+ m25p,fast-read; -+ label = "spi2:1"; -+ spi-max-frequency = <50000000>; -+ spi-tx-bus-width = <2>; -+ spi-rx-bus-width = <2>; ++ reset-gpios = <&gpio1 ASPEED_GPIO(G, 4) GPIO_ACTIVE_LOW>; + }; +}; -+#endif + -+#if 0 -+&can0 { -+ status = "okay"; -+}; -+#endif + +&emmc_controller { + status = "okay"; @@ -667,13 +381,7 @@ index 0000000..edad94f + +&emmc { + status = "okay"; -+#if 1 + bus-width = <4>; -+#else -+ bus-width = <8>; -+ pinctrl-0 = <&pinctrl_emmc_default -+ &pinctrl_emmcg8_default>; -+#endif + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc_default &pinctrl_emmcclk_driving &pinctrl_emmccmd_driving &pinctrl_emmcdat_driving>; + @@ -681,17 +389,6 @@ index 0000000..edad94f + max-frequency = <200000000>; +}; + -+#if 0 -+&ufs_controller { -+ status = "okay"; -+}; -+ -+&ufs { -+ status = "okay"; -+ lanes-per-direction = <2>; -+ ref-clk-freq = <26000000>; -+}; -+#endif + +&chassis { + status = "okay"; @@ -699,7 +396,6 @@ index 0000000..edad94f + +&mac0 { + status = "okay"; -+ /*compatible = "brcm,bcm53134";*/ + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii0_default &pinctrl_rgmii0_driving>; @@ -711,64 +407,9 @@ index 0000000..edad94f +}; + +&mdio0 { -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ switch@1e { -+ compatible = "brcm,bcm53134"; -+ reg = <0x1e>; -+ -+ dsa,member = <0 0>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ /* Port 0 - External RJ45 with internal PHY */ -+ port@0 { -+ reg = <0>; -+ label = "rj45"; -+ phy-handle = <&switch0phy0>; -+ }; -+ -+ /* Port 5 - x86 with internal PHY */ -+ port@5 { -+ reg = <5>; -+ label = "x86"; -+ phy-handle = <&switch0phy5>; -+ }; -+ -+ /* Port 8 - IMP to AST2700 MAC0 */ -+ port@8 { -+ reg = <8>; -+ label = "cpu"; -+ ethernet = <&mac0>; -+ phy-mode = "rgmii-id"; -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ pause; -+ }; -+ }; -+ }; -+ -+ /* BCM53134 internal MDIO bus for internal PHYs */ -+ mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ switch0phy0: ethernet-phy@0 { -+ reg = <0>; -+ }; -+ -+ switch0phy5: ethernet-phy@5 { -+ reg = <5>; -+ }; -+ }; -+ }; ++ status = "okay"; +}; + -+ +&syscon1 { + assigned-clocks = <&syscon1 SCU1_CLK_MACHCLK>, + <&syscon1 SCU1_CLK_RGMII>, @@ -779,58 +420,23 @@ index 0000000..edad94f +&espi0 { + status = "okay"; + perif-dma-mode; -+ perif-mmbi-enable; -+ perif-mmbi-src-addr = <0x0 0xa8000000>; -+ perif-mmbi-tgt-memory = <&espi0_mmbi_memory>; -+ perif-mmbi-instance-num = <0x1>; ++ // perif-mmbi-enable; ++ // perif-mmbi-src-addr = <0x0 0xa8000000>; ++ // perif-mmbi-tgt-memory = <&espi0_mmbi_memory>; ++ // perif-mmbi-instance-num = <0x1>; + perif-mcyc-enable; + perif-mcyc-src-addr = <0x0 0x98000000>; + perif-mcyc-size = <0x0 0x10000>; -+ perif-rtc-enable; ++ memory-region = <&espi0_mcyc_memory>; ++ // perif-rtc-enable; ++ vw-pltrst-monitor; + oob-dma-mode; -+ flash-dma-mode; -+#if 0 // if support eDAF MIX mode, open this if case to use sample code -+ flash-edaf-mode = <0x0>; -+ flash-edaf-tgt-addr = <&edaf0>; -+ flash-edaf-size = <0x0 0x4000000>; -+#endif -+}; -+ -+&rtc_over_espi0 { -+ status = "okay"; -+}; -+ -+#if 0 -+&lpc0_kcs0 { -+ status = "okay"; -+ kcs-io-addr = <0xca0>; -+ kcs-channel = <0>; -+}; -+ -+&lpc0_kcs1 { -+ status = "okay"; -+ kcs-io-addr = <0xca8>; -+ kcs-channel = <1>; -+}; -+ -+&lpc0_kcs2 { -+ status = "okay"; -+ kcs-io-addr = <0xca2>; -+ kcs-channel = <2>; -+}; -+ -+&lpc0_kcs3 { -+ status = "okay"; -+ kcs-io-addr = <0xca4>; -+ kcs-channel = <3>; +}; -+#endif + +&rtc { + status = "okay"; +}; + -+ +&jtag0 { + status = "okay"; +}; @@ -875,7 +481,6 @@ index 0000000..edad94f + sd-uhs-sdr104; /* enable sdr104 to execute tuning */ +}; + -+#if 1 +&i2c0 { + status = "okay"; +}; @@ -886,6 +491,13 @@ index 0000000..edad94f + +&i2c2 { + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2_default>; ++ ++ adm1266: adm1266@41 { ++ compatible = "adi,adm1266"; ++ reg = <0x41>; ++ }; +}; + +&i2c3 { @@ -921,11 +533,11 @@ index 0000000..edad94f +}; + +&i2c9 { -+ status = "okay"; ++ status = "okay"; +}; + +&i2c10 { -+ status = "okay"; ++ status = "okay"; +}; + +&i2c11 { @@ -939,13 +551,7 @@ index 0000000..edad94f +&i2c13 { + status = "disabled"; +}; -+#endif + -+#if 0 -+&ehci0 { -+ status = "okay"; -+}; -+#endif + +&vhubb0 { + status = "disabled"; @@ -956,12 +562,6 @@ index 0000000..edad94f + pinctrl-0 = <&pinctrl_usb2bd1_default>; +}; + -+#if 0 -+&vhuba0 { -+ status = "okay"; -+ pinctrl-0 = <&pinctrl_usb2ahpd0_default>; -+}; -+#endif +&wdt0 { + status = "okay"; +};