From 202a4dde57ef37003531a3a8dc63a6a8f3b27711 Mon Sep 17 00:00:00 2001 From: Ashnaa Seth Date: Sat, 18 Apr 2026 18:06:29 +0000 Subject: [PATCH 1/2] rtl: fix missing else in QSPI_XIP_CTRL HREADYOUT st_rw state In st_rw, HREADYOUT was not assigned when no active AHB transfer occurred, causing it to hold a stale 0. Add the missing else clause to drive HREADYOUT high, consistent with st_idle behavior. Signed-off-by: ashnaaseth2325-oss Signed-off-by: Ashnaa Seth --- flow/designs/src/chameleon/IPs/QSPI_XIP_CTRL.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/flow/designs/src/chameleon/IPs/QSPI_XIP_CTRL.v b/flow/designs/src/chameleon/IPs/QSPI_XIP_CTRL.v index 62b23c7ad7..e24551eaf8 100644 --- a/flow/designs/src/chameleon/IPs/QSPI_XIP_CTRL.v +++ b/flow/designs/src/chameleon/IPs/QSPI_XIP_CTRL.v @@ -95,7 +95,7 @@ module QSPI_XIP_CTRL( else HREADYOUT <= 1'b0; st_rw : if(HTRANS[1] & HSEL & HREADY & c_hit) HREADYOUT <= 1'b1; else if(HTRANS[1] & HSEL & HREADY & ~c_hit) HREADYOUT <= 1'b0; - //else HREADYOUT <= 1'b1; + else HREADYOUT <= 1'b1; endcase From 4751e8fce36830e18e4b2dbf486d4093a2eab18a Mon Sep 17 00:00:00 2001 From: Ashnaa Seth Date: Mon, 20 Apr 2026 18:23:51 +0000 Subject: [PATCH 2/2] trigger CI Signed-off-by: Ashnaa Seth