From 65ae766967e658a12b5fdb219603768bb5a06c1c Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 13 Jan 2025 13:51:08 +0100 Subject: [PATCH 1/7] ARM: dts: stm32: Sync DT with kernel v6.6-stm32mp-r2-rc6-preint5 Synchronize DT with kernel v6.6-stm32mp-r2-rc6-preint5 Signed-off-by: Patrice Chotard Change-Id: I2c8ee8eaf1bd6094447a5f03b6e607155002c6a6 --- arch/arm/dts/stm32mp13-pinctrl.dtsi | 15 + arch/arm/dts/stm32mp131.dtsi | 39 +- arch/arm/dts/stm32mp135f-dk.dts | 45 ++- arch/arm/dts/stm32mp13xa.dtsi | 2 +- arch/arm/dts/stm32mp13xd.dtsi | 2 +- arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi | 2 +- arch/arm/dts/stm32mp15-m4-srm.dtsi | 2 +- arch/arm/dts/stm32mp151.dtsi | 24 +- arch/arm/dts/stm32mp157a-dk1-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157a-ed1-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157a-ed1.dts | 2 +- arch/arm/dts/stm32mp157a-ev1-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157a-ev1.dts | 66 +++- arch/arm/dts/stm32mp157c-dk2-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157c-dk2.dts | 2 +- arch/arm/dts/stm32mp157c-ed1-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157c-ev1-scmi.dtsi | 2 +- arch/arm/dts/stm32mp157c-ev1.dts | 59 ++- arch/arm/dts/stm32mp157d-dk1.dts | 2 +- arch/arm/dts/stm32mp157d-ed1.dts | 2 +- arch/arm/dts/stm32mp157d-ev1.dts | 66 +++- arch/arm/dts/stm32mp157f-dk2.dts | 4 +- arch/arm/dts/stm32mp157f-ed1.dts | 2 +- arch/arm/dts/stm32mp157f-ev1.dts | 61 ++- arch/arm/dts/stm32mp15xa.dtsi | 2 +- arch/arm/dts/stm32mp15xd.dtsi | 2 +- arch/arm/dts/stm32mp15xf.dtsi | 2 +- arch/arm/dts/stm32mp15xx-dkx.dtsi | 8 + arch/arm/dts/stm32mp21-pinctrl.dtsi | 6 + arch/arm/dts/stm32mp211.dtsi | 370 ++++++++++++------ arch/arm/dts/stm32mp213.dtsi | 6 +- arch/arm/dts/stm32mp215.dtsi | 20 +- .../dts/stm32mp215f-dk-ca35tdcid-resmem.dtsi | 23 +- arch/arm/dts/stm32mp215f-dk.dts | 216 +++++++--- arch/arm/dts/stm32mp21xc.dtsi | 1 + arch/arm/dts/stm32mp21xf.dtsi | 1 + arch/arm/dts/stm32mp23-u-boot.dtsi | 10 - arch/arm/dts/stm32mp231.dtsi | 273 +++++++------ arch/arm/dts/stm32mp233.dtsi | 25 +- arch/arm/dts/stm32mp235.dtsi | 8 +- .../dts/stm32mp235f-dk-ca35tdcid-resmem.dtsi | 14 +- arch/arm/dts/stm32mp235f-dk.dts | 113 +----- arch/arm/dts/stm32mp23xc.dtsi | 2 +- arch/arm/dts/stm32mp23xf.dtsi | 2 +- arch/arm/dts/stm32mp25-pinctrl.dtsi | 15 + arch/arm/dts/stm32mp251.dtsi | 283 +++++++------- arch/arm/dts/stm32mp253.dtsi | 14 +- arch/arm/dts/stm32mp255.dtsi | 10 +- arch/arm/dts/stm32mp257.dtsi | 2 +- .../dts/stm32mp257f-dk-ca35tdcid-resmem.dtsi | 14 +- arch/arm/dts/stm32mp257f-dk.dts | 162 +++----- .../dts/stm32mp257f-ev1-ca35tdcid-resmem.dtsi | 16 +- arch/arm/dts/stm32mp257f-ev1.dts | 114 +----- arch/arm/dts/stm32mp25xc.dtsi | 8 +- arch/arm/dts/stm32mp25xf.dtsi | 8 +- arch/arm/dts/stm32mp25xxaj-pinctrl.dtsi | 2 +- include/dt-bindings/clock/st,stm32mp21-rcc.h | 3 +- .../regulator/st,stm32mp21-regulator.h | 2 +- .../regulator/st,stm32mp25-regulator.h | 2 +- 59 files changed, 1234 insertions(+), 934 deletions(-) diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi b/arch/arm/dts/stm32mp13-pinctrl.dtsi index 33416738a345..08042e87b1bb 100644 --- a/arch/arm/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi @@ -276,6 +276,21 @@ }; }; + pwm1_ch3n_pins_a: pwm1-ch3n-0 { + pins { + pinmux = ; /* TIM1_CH3N */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm1_ch3n_sleep_pins_a: pwm1-ch3n-sleep-0 { + pins { + pinmux = ; /* TIM1_CH3N */ + }; + }; + pwm3_pins_a: pwm3-0 { pins { pinmux = ; /* TIM3_CH4 */ diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index e555717c0048..471ac5183857 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -161,6 +161,30 @@ interrupt-parent = <&intc>; ranges; + sram1: sram@30000000 { + compatible = "mmio-sram"; + reg = <0x30000000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30000000 0x4000>; + }; + + sram2: sram@30004000 { + compatible = "mmio-sram"; + reg = <0x30004000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30004000 0x2000>; + }; + + sram3: sram@30006000 { + compatible = "mmio-sram"; + reg = <0x30006000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30006000 0x2000>; + }; + timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>; @@ -1134,6 +1158,7 @@ iwdg2: watchdog@5a002000 { compatible = "st,stm32mp1-iwdg"; reg = <0x5a002000 0x400>; + interrupts = ; clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>; clock-names = "pclk", "lsi"; status = "disabled"; @@ -1147,6 +1172,15 @@ status = "disabled"; }; + iwdg1: watchdog@5c003000 { + compatible = "st,stm32mp1-iwdg"; + reg = <0x5c003000 0x400>; + interrupts = ; + clocks = <&rcc IWDG1>, <&scmi_clk CK_SCMI_LSI>; + clock-names = "pclk", "lsi"; + status = "disabled"; + }; + rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; @@ -1324,8 +1358,9 @@ #address-cells = <1>; #size-cells = <0>; dmas = <&dmamux1 85 0x400 0x01>, - <&dmamux1 86 0x400 0x01>; - dma-names = "rx", "tx"; + <&dmamux1 86 0x400 0x01>, + <&mdma 0 0x3 0x1200000a 0 0>; + dma-names = "rx", "tx", "rxm2m"; access-controllers = <&etzpc 19>; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts index d3b47650d7e0..9e53c7d49d9c 100644 --- a/arch/arm/dts/stm32mp135f-dk.dts +++ b/arch/arm/dts/stm32mp135f-dk.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "stm32mp135.dtsi" #include "stm32mp13xf.dtsi" @@ -36,6 +37,7 @@ framebuffer { compatible = "simple-framebuffer"; clocks = <&rcc LTDC_PX>; + lcd-supply = <&scmi_v3v3_sw>; status = "disabled"; }; }; @@ -99,10 +101,11 @@ }; panel_backlight: panel-backlight { - compatible = "gpio-backlight"; - gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>; - default-on; - default-brightness-level = <1>; + compatible = "pwm-backlight"; + pwms = <&pwm1 2 1000000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; + default-brightness-level = <10>; + power-supply = <&scmi_v3v3_sw>; status = "okay"; }; @@ -112,6 +115,7 @@ backlight = <&panel_backlight>; power-supply = <&scmi_v3v3_sw>; data-mapping = "bgr666"; + default-on; status = "okay"; width-mm = <105>; @@ -450,23 +454,23 @@ reg = ; regulator-name = "vddcore"; }; - scmi_vdd_adc: regulator@10 { + scmi_vdd_adc: regulator@a { reg = ; regulator-name = "vdd_adc"; }; - scmi_vdd_usb: regulator@13 { + scmi_vdd_usb: regulator@d { reg = ; regulator-name = "vdd_usb"; }; - scmi_vdd_sd: regulator@14 { + scmi_vdd_sd: regulator@e { reg = ; regulator-name = "vdd_sd"; }; - scmi_v1v8_periph: regulator@15 { + scmi_v1v8_periph: regulator@f { reg = ; regulator-name = "v1v8_periph"; }; - scmi_v3v3_sw: regulator@19 { + scmi_v3v3_sw: regulator@13 { reg = ; regulator-name = "v3v3_sw"; }; @@ -511,9 +515,30 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&spi5_pins_a>; pinctrl-1 = <&spi5_sleep_pins_a>; + sram = <&spi5_dma_pool>; status = "disabled"; }; +&sram2 { + spi5_dma_pool: dma-sram@1000 { + reg = <0x1000 0x1000>; + pool; + }; +}; + +&timers1 { + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; + pwm1: pwm { + pinctrl-0 = <&pwm1_ch3n_pins_a>; + pinctrl-1 = <&pwm1_ch3n_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; +}; + &timers3 { /delete-property/dmas; /delete-property/dma-names; @@ -625,7 +650,7 @@ bluetooth { shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>; compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; + max-speed = <2000000>; vbat-supply = <&v3v3_ao>; vddio-supply = <&v3v3_ao>; }; diff --git a/arch/arm/dts/stm32mp13xa.dtsi b/arch/arm/dts/stm32mp13xa.dtsi index cc6456e71be9..5fb0294e6e6c 100644 --- a/arch/arm/dts/stm32mp13xa.dtsi +++ b/arch/arm/dts/stm32mp13xa.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp13xd.dtsi b/arch/arm/dts/stm32mp13xd.dtsi index 2a436a379ede..3b2c116ada47 100644 --- a/arch/arm/dts/stm32mp13xd.dtsi +++ b/arch/arm/dts/stm32mp13xd.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi b/arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi index 49a3ea5db90b..484b4e8e5339 100644 --- a/arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-m4-srm-pinctrl.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved * Author: Fabien Dessenne for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp15-m4-srm.dtsi b/arch/arm/dts/stm32mp15-m4-srm.dtsi index 7fa3ca411a95..acc0bf9dd656 100644 --- a/arch/arm/dts/stm32mp15-m4-srm.dtsi +++ b/arch/arm/dts/stm32mp15-m4-srm.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved * Author: Fabien Dessenne for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index d0ae364f5661..1a70a62902e0 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -32,17 +32,10 @@ compatible = "operating-points-v2"; opp-shared; - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1200000>; - opp-supported-hw = <0x2>; - opp-suspend; - }; - opp-650000000 { opp-hz = /bits/ 64 <650000000>; opp-microvolt = <1200000>; - opp-supported-hw = <0x1>; + opp-supported-hw = <0x3>; }; opp-800000000 { @@ -596,6 +589,7 @@ iwdg2: watchdog@5a002000 { compatible = "st,stm32mp1-iwdg"; reg = <0x5a002000 0x400>; + interrupts = ; clocks = <&rcc IWDG2>, <&rcc CK_LSI>; clock-names = "pclk", "lsi"; status = "disabled"; @@ -632,6 +626,15 @@ status = "disabled"; }; + iwdg1: watchdog@5c003000 { + compatible = "st,stm32mp1-iwdg"; + reg = <0x5c003000 0x400>; + interrupts = ; + clocks = <&rcc IWDG1>, <&rcc CK_LSI>; + clock-names = "pclk", "lsi"; + status = "disabled"; + }; + rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; @@ -1399,8 +1402,9 @@ clocks = <&rcc SPI4_K>; resets = <&rcc SPI4_R>; dmas = <&dmamux1 83 0x400 0x01>, - <&dmamux1 84 0x400 0x01>; - dma-names = "rx", "tx"; + <&dmamux1 84 0x400 0x01>, + <&mdma1 0 0x3 0x1200000a 0 0>; + dma-names = "rx", "tx", "rxm2m"; access-controllers = <&etzpc 53>; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi.dtsi index 34fcf8c155d6..3f6eb362040f 100644 --- a/arch/arm/dts/stm32mp157a-dk1-scmi.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157a-ed1-scmi.dtsi b/arch/arm/dts/stm32mp157a-ed1-scmi.dtsi index 283f63f85d15..0edd2bf4835f 100644 --- a/arch/arm/dts/stm32mp157a-ed1-scmi.dtsi +++ b/arch/arm/dts/stm32mp157a-ed1-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157a-ed1.dts b/arch/arm/dts/stm32mp157a-ed1.dts index 7722b32828f1..5d17d6c10dde 100644 --- a/arch/arm/dts/stm32mp157a-ed1.dts +++ b/arch/arm/dts/stm32mp157a-ed1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157a-ev1-scmi.dtsi b/arch/arm/dts/stm32mp157a-ev1-scmi.dtsi index 0c79a2b3edab..ee10768051a7 100644 --- a/arch/arm/dts/stm32mp157a-ev1-scmi.dtsi +++ b/arch/arm/dts/stm32mp157a-ev1-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157a-ev1.dts b/arch/arm/dts/stm32mp157a-ev1.dts index f70d077207a5..362db3704bb5 100644 --- a/arch/arm/dts/stm32mp157a-ev1.dts +++ b/arch/arm/dts/stm32mp157a-ev1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. @@ -29,7 +29,7 @@ framebuffer { compatible = "simple-framebuffer"; - clocks = <&rcc LTDC_PX>; + clocks = <&rcc LTDC_PX>, <&rcc DSI>, <&rcc DSI_PX>; status = "disabled"; }; }; @@ -134,6 +134,7 @@ compatible = "gpio-backlight"; gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; default-on; + default-brightness-level = <1>; status = "okay"; }; @@ -223,13 +224,18 @@ dfsdm0: filter@0 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <3>; - st,adc-channel-names = "dmic_u1"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@3 { + reg = <3>; + label = "dmic_u1"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm0: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -246,14 +252,19 @@ dfsdm1: filter@1 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <0>; - st,adc-channel-names = "dmic_u2"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; - st,adc-alt-channel = <1>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u2"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm1: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -270,14 +281,19 @@ dfsdm2: filter@2 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <2>; - st,adc-channel-names = "dmic_u3"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; - st,adc-alt-channel = <1>; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@2 { + reg = <2>; + label = "dmic_u3"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm2: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -294,13 +310,18 @@ dfsdm3: filter@3 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <1>; - st,adc-channel-names = "dmic_u4"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u4"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm3: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -319,6 +340,7 @@ &dsi { #address-cells = <1>; #size-cells = <0>; + default-on; status = "okay"; panel_dsi: panel@0 { @@ -327,6 +349,9 @@ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; backlight = <&panel_backlight>; power-supply = <&v3v3>; + vcc-supply = <&v3v3>; + iovcc-supply = <&v3v3>; + default-on; status = "okay"; port { @@ -525,6 +550,7 @@ }; <dc { + default-on; status = "okay"; port { diff --git a/arch/arm/dts/stm32mp157c-dk2-scmi.dtsi b/arch/arm/dts/stm32mp157c-dk2-scmi.dtsi index 0b8bba427cda..ead69e3decc1 100644 --- a/arch/arm/dts/stm32mp157c-dk2-scmi.dtsi +++ b/arch/arm/dts/stm32mp157c-dk2-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts index d8992a6efad8..a37c3f2fe152 100644 --- a/arch/arm/dts/stm32mp157c-dk2.dts +++ b/arch/arm/dts/stm32mp157c-dk2.dts @@ -145,7 +145,7 @@ bluetooth { shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; + max-speed = <2000000>; vbat-supply = <&v3v3>; vddio-supply = <&v3v3>; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi.dtsi index a26929e6966b..1d39c343ad55 100644 --- a/arch/arm/dts/stm32mp157c-ed1-scmi.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157c-ev1-scmi.dtsi b/arch/arm/dts/stm32mp157c-ev1-scmi.dtsi index b682649ebe9b..37fac21741eb 100644 --- a/arch/arm/dts/stm32mp157c-ev1-scmi.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-scmi.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index 8736d78ee9a2..23f863ac8fa2 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -224,13 +224,18 @@ dfsdm0: filter@0 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <3>; - st,adc-channel-names = "dmic_u1"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@3 { + reg = <3>; + label = "dmic_u1"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm0: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -247,14 +252,19 @@ dfsdm1: filter@1 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <0>; - st,adc-channel-names = "dmic_u2"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; - st,adc-alt-channel = <1>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u2"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm1: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -271,14 +281,19 @@ dfsdm2: filter@2 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <2>; - st,adc-channel-names = "dmic_u3"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; - st,adc-alt-channel = <1>; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@2 { + reg = <2>; + label = "dmic_u3"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm2: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -295,13 +310,18 @@ dfsdm3: filter@3 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <1>; - st,adc-channel-names = "dmic_u4"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u4"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm3: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -329,6 +349,9 @@ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; backlight = <&panel_backlight>; power-supply = <&v3v3>; + vcc-supply = <&v3v3>; + iovcc-supply = <&v3v3>; + default-on; status = "okay"; port { diff --git a/arch/arm/dts/stm32mp157d-dk1.dts b/arch/arm/dts/stm32mp157d-dk1.dts index 0fbaeccc7301..e6d2e7c5e7ca 100644 --- a/arch/arm/dts/stm32mp157d-dk1.dts +++ b/arch/arm/dts/stm32mp157d-dk1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157d-ed1.dts b/arch/arm/dts/stm32mp157d-ed1.dts index 068e598b1329..d823250956a2 100644 --- a/arch/arm/dts/stm32mp157d-ed1.dts +++ b/arch/arm/dts/stm32mp157d-ed1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157d-ev1.dts b/arch/arm/dts/stm32mp157d-ev1.dts index 78c790bdfcfd..877a8c00bfbc 100644 --- a/arch/arm/dts/stm32mp157d-ev1.dts +++ b/arch/arm/dts/stm32mp157d-ev1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. @@ -29,7 +29,7 @@ framebuffer { compatible = "simple-framebuffer"; - clocks = <&rcc LTDC_PX>; + clocks = <&rcc LTDC_PX>, <&rcc DSI>, <&rcc DSI_PX>; status = "disabled"; }; }; @@ -134,6 +134,7 @@ compatible = "gpio-backlight"; gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; default-on; + default-brightness-level = <1>; status = "okay"; }; @@ -223,13 +224,18 @@ dfsdm0: filter@0 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <3>; - st,adc-channel-names = "dmic_u1"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@3 { + reg = <3>; + label = "dmic_u1"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm0: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -246,14 +252,19 @@ dfsdm1: filter@1 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <0>; - st,adc-channel-names = "dmic_u2"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; - st,adc-alt-channel = <1>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u2"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm1: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -270,14 +281,19 @@ dfsdm2: filter@2 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <2>; - st,adc-channel-names = "dmic_u3"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; - st,adc-alt-channel = <1>; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@2 { + reg = <2>; + label = "dmic_u3"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm2: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -294,13 +310,18 @@ dfsdm3: filter@3 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <1>; - st,adc-channel-names = "dmic_u4"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u4"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm3: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -319,6 +340,7 @@ &dsi { #address-cells = <1>; #size-cells = <0>; + default-on; status = "okay"; panel_dsi: panel@0 { @@ -327,6 +349,9 @@ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; backlight = <&panel_backlight>; power-supply = <&v3v3>; + vcc-supply = <&v3v3>; + iovcc-supply = <&v3v3>; + default-on; status = "okay"; port { @@ -525,6 +550,7 @@ }; <dc { + default-on; status = "okay"; port { diff --git a/arch/arm/dts/stm32mp157f-dk2.dts b/arch/arm/dts/stm32mp157f-dk2.dts index 523d7ef309f2..0748828dabcc 100644 --- a/arch/arm/dts/stm32mp157f-dk2.dts +++ b/arch/arm/dts/stm32mp157f-dk2.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. @@ -156,7 +156,7 @@ bluetooth { shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; + max-speed = <2000000>; vbat-supply = <&v3v3>; vddio-supply = <&v3v3>; }; diff --git a/arch/arm/dts/stm32mp157f-ed1.dts b/arch/arm/dts/stm32mp157f-ed1.dts index fbfb25cd65be..ef97d301de5b 100644 --- a/arch/arm/dts/stm32mp157f-ed1.dts +++ b/arch/arm/dts/stm32mp157f-ed1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp157f-ev1.dts b/arch/arm/dts/stm32mp157f-ev1.dts index 74cea13fcfa1..d525c2e6d352 100644 --- a/arch/arm/dts/stm32mp157f-ev1.dts +++ b/arch/arm/dts/stm32mp157f-ev1.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. @@ -225,13 +225,18 @@ dfsdm0: filter@0 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <3>; - st,adc-channel-names = "dmic_u1"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@3 { + reg = <3>; + label = "dmic_u1"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm0: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -248,14 +253,19 @@ dfsdm1: filter@1 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <0>; - st,adc-channel-names = "dmic_u2"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; - st,adc-alt-channel = <1>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u2"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm1: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -272,14 +282,19 @@ dfsdm2: filter@2 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <2>; - st,adc-channel-names = "dmic_u3"; - st,adc-channel-types = "SPI_F"; - st,adc-channel-clk-src = "CLKOUT"; - st,adc-alt-channel = <1>; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@2 { + reg = <2>; + label = "dmic_u3"; + st,adc-channel-type = "SPI_F"; + st,adc-channel-clk-src = "CLKOUT"; + st,adc-alt-channel; + }; + asoc_pdm2: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -296,13 +311,18 @@ dfsdm3: filter@3 { compatible = "st,stm32-dfsdm-dmic"; - st,adc-channels = <1>; - st,adc-channel-names = "dmic_u4"; - st,adc-channel-types = "SPI_R"; - st,adc-channel-clk-src = "CLKOUT"; st,filter-order = <3>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u4"; + st,adc-channel-type = "SPI_R"; + st,adc-channel-clk-src = "CLKOUT"; + }; + asoc_pdm3: dfsdm-dai { compatible = "st,stm32h7-dfsdm-dai"; #sound-dai-cells = <0>; @@ -330,6 +350,9 @@ reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; backlight = <&panel_backlight>; power-supply = <&v3v3>; + vcc-supply = <&v3v3>; + iovcc-supply = <&v3v3>; + default-on; status = "okay"; port { diff --git a/arch/arm/dts/stm32mp15xa.dtsi b/arch/arm/dts/stm32mp15xa.dtsi index f56c44a122ed..9bc874c55f07 100644 --- a/arch/arm/dts/stm32mp15xa.dtsi +++ b/arch/arm/dts/stm32mp15xa.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp15xd.dtsi b/arch/arm/dts/stm32mp15xd.dtsi index a5feeec2e4cd..bfa1039bf8cb 100644 --- a/arch/arm/dts/stm32mp15xd.dtsi +++ b/arch/arm/dts/stm32mp15xd.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp15xf.dtsi b/arch/arm/dts/stm32mp15xf.dtsi index 8134f7ec6282..f05f9b16f5ef 100644 --- a/arch/arm/dts/stm32mp15xf.dtsi +++ b/arch/arm/dts/stm32mp15xf.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 5fae7937c740..4b7e3a317918 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -624,6 +624,7 @@ pinctrl-0 = <&spi4_pins_b>; pinctrl-1 = <&spi4_sleep_pins_b>; status = "disabled"; + sram = <&spi4_dma_pool>; }; &spi5 { @@ -633,6 +634,13 @@ status = "disabled"; }; +&sram4 { + spi4_dma_pool: dma-sram@9000 { + reg = <0x9000 0x1000>; + pool; + }; +}; + &timers1 { /* spare dmas for other usage */ /delete-property/dmas; diff --git a/arch/arm/dts/stm32mp21-pinctrl.dtsi b/arch/arm/dts/stm32mp21-pinctrl.dtsi index b22a2c07977d..c83b31aec240 100644 --- a/arch/arm/dts/stm32mp21-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp21-pinctrl.dtsi @@ -264,6 +264,12 @@ }; }; + rtc_out1_pins_a: rtc-out1-pins-0 { + pins { + pinmux = ; /* RTC_OUT1 */ + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { pinmux = , /* SDMMC1_D0 */ diff --git a/arch/arm/dts/stm32mp211.dtsi b/arch/arm/dts/stm32mp211.dtsi index 748f66f9decf..b58c7acbb19e 100644 --- a/arch/arm/dts/stm32mp211.dtsi +++ b/arch/arm/dts/stm32mp211.dtsi @@ -22,10 +22,43 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; - power-domains = <&CPU_PD0>; + clocks = <&scmi_perf 0>; + clock-names = "cpu"; + power-domains = <&cpu0_pd>; power-domain-names = "psci"; #cooling-cells = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x00000001>; + local-timer-stop; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <1000>; + }; + }; + + domain-idle-states { + STOP1: domain-stop1 { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x00000011>; + entry-latency-us = <300>; + exit-latency-us = <500>; + min-residency-us = <1500>; + }; + + LP_STOP1: domain-lp-stop1 { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x0000021>; + entry-latency-us = <350>; + exit-latency-us = <600>; + min-residency-us = <2000>; + }; + }; }; arm-pmu { @@ -41,6 +74,14 @@ status = "disabled"; }; + clocks { + clk_rcbsec: clk-rcbsec { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <64000000>; + }; + }; + cs_replicator: replicator { compatible = "arm,coresight-static-replicator"; clocks = <&scmi_clk CK_SCMI_SYSATB>; @@ -91,6 +132,11 @@ #size-cells = <0>; linaro,optee-channel-id = <0>; + scmi_perf: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + }; + scmi_clk: protocol@14 { reg = <0x14>; #clock-cells = <1>; @@ -120,7 +166,7 @@ reg = ; regulator-name = "vddio3"; }; - scmi_vdda18adc: regulator@7 { + scmi_vdda18adc: regulator@3 { reg = ; regulator-name = "vdda18adc"; }; @@ -130,31 +176,41 @@ }; intc: interrupt-controller@4ac00000 { - compatible = "arm,cortex-a7-gic"; + compatible = "st,stm32mp2-cortex-a7-gic", "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; + interrupt-parent = <&intc>; reg = <0x0 0x4ac10000 0x0 0x1000>, <0x0 0x4ac20000 0x0 0x2000>, <0x0 0x4ac40000 0x0 0x2000>, <0x0 0x4ac60000 0x0 0x2000>; + interrupts = ; #address-cells = <1>; }; + d1_pd: power-domain-d1 { + compatible = "st,stm32mp-pm-domain"; + #power-domain-cells = <0>; + power-domains = <&cluster_pd>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: power-domain-cpu0 { + cpu0_pd: power-domain-cpu0 { #power-domain-cells = <0>; - power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&cluster_pd>; }; - CLUSTER_PD: power-domain-cluster { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; - power-domains = <&RET_PD>; + domain-idle-states = <&STOP1>, <&LP_STOP1>; + power-domains = <&ret_pd>; }; - RET_PD: power-domain-retention { + ret_pd: power-domain-retention { #power-domain-cells = <0>; }; }; @@ -201,6 +257,7 @@ usb2_phy1: usb2-phy1 { compatible = "st,stm32mp21-usb2phy"; #phy-cells = <0>; + #clock-cells = <0>; st,syscfg = <&syscfg 0x2400>; clocks = <&rcc CK_KER_USB2PHY1>; resets = <&rcc USB2PHY1_R>; @@ -210,13 +267,16 @@ usb2_phy2: usb2-phy2 { compatible = "st,stm32mp21-usb2phy"; #phy-cells = <0>; + #clock-cells = <0>; st,syscfg = <&syscfg 0x2800>; clocks = <&rcc CK_KER_USB2PHY2EN>; resets = <&rcc USB2PHY2_R>; + interrupts-extended = <&exti1 44 IRQ_TYPE_EDGE_RISING>; + wakeup-source; status = "disabled"; }; - soc@0 { + soc0: soc@0 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <2>; @@ -244,6 +304,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA1>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; st,syscfg-arcr = <&syscfg 0x2050 0x1>; @@ -269,6 +330,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA2>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; st,syscfg-arcr = <&syscfg 0x2050 0x2>; @@ -294,6 +356,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA3>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; st,syscfg-arcr = <&syscfg 0x2050 0x4>; @@ -312,7 +375,7 @@ }; rifsc: bus@42080000 { - compatible = "st,stm32mp25-rifsc", "simple-bus"; + compatible = "st,stm32mp21-rifsc", "simple-bus"; reg = <0x42080000 0x0 0x1000>; #address-cells = <1>; #size-cells = <2>; @@ -332,7 +395,7 @@ <&hpdma 35 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -346,7 +409,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 1>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -377,7 +440,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 2>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -408,7 +471,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 3>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -440,7 +503,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 4>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -472,7 +535,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 5>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -497,7 +560,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 6>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -522,7 +585,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 10>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -553,7 +616,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 11>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -584,7 +647,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -606,7 +669,7 @@ }; lptimer1: timer@40090000 { - compatible = "st,stm32mp21-lptimer"; + compatible = "st,stm32mp21-lptimer", "st,stm32-lptimer"; reg = <0x40090000 0x0 0x400>; interrupts-extended = <&exti1 47 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM1>; @@ -614,35 +677,35 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 17>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp21-lptimer-counter"; + compatible = "st,stm32mp21-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp21-pwm-lp"; + compatible = "st,stm32mp21-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp21-lptimer-timer"; + compatible = "st,stm32mp21-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@0 { - compatible = "st,stm32mp21-lptimer-trigger"; + compatible = "st,stm32mp21-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <0>; status = "disabled"; }; }; lptimer2: timer@400a0000 { - compatible = "st,stm32mp21-lptimer"; + compatible = "st,stm32mp21-lptimer", "st,stm32-lptimer"; reg = <0x400a0000 0x0 0x400>; interrupts-extended = <&exti1 48 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM2>; @@ -650,28 +713,28 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 18>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp21-lptimer-counter"; + compatible = "st,stm32mp21-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp21-pwm-lp"; + compatible = "st,stm32mp21-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp21-lptimer-timer"; + compatible = "st,stm32mp21-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@1 { - compatible = "st,stm32mp21-lptimer-trigger"; + compatible = "st,stm32mp21-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <1>; status = "disabled"; }; @@ -689,7 +752,7 @@ <&hpdma 35 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -705,7 +768,7 @@ <&hpdma 37 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -721,7 +784,7 @@ <&hpdma 37 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -742,52 +805,56 @@ usart2: serial@400e0000 { compatible = "st,stm32h7-uart"; reg = <0x400e0000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_USART2>; dmas = <&hpdma 11 0x40 0x12>, <&hpdma 12 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 32>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; usart3: serial@400f0000 { compatible = "st,stm32h7-uart"; reg = <0x400f0000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_USART3>; dmas = <&hpdma 13 0x40 0x12>, <&hpdma 14 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 33>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; uart4: serial@40100000 { compatible = "st,stm32h7-uart"; reg = <0x40100000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_UART4>; dmas = <&hpdma 15 0x40 0x12>, <&hpdma 16 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 34>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; uart5: serial@40110000 { compatible = "st,stm32h7-uart"; reg = <0x40110000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_UART5>; dmas = <&hpdma 17 0x40 0x12>, <&hpdma 18 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 35>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; @@ -804,7 +871,7 @@ <&hpdma 24 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 41>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -821,7 +888,7 @@ <&hpdma 27 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 42>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -834,7 +901,7 @@ clocks = <&rcc CK_KER_I3C1>; resets = <&rcc I3C1_R>; access-controllers = <&rifsc 114>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -847,7 +914,7 @@ clocks = <&rcc CK_KER_I3C2>; resets = <&rcc I3C2_R>; access-controllers = <&rifsc 115>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -861,7 +928,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 8>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -892,7 +959,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 9>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -926,7 +993,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 0>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -960,7 +1027,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 7>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -984,13 +1051,14 @@ usart6: serial@40220000 { compatible = "st,stm32h7-uart"; reg = <0x40220000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_USART6>; dmas = <&hpdma 19 0x40 0x12>, <&hpdma 20 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 36>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; @@ -1006,7 +1074,7 @@ <&hpdma 33 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1022,7 +1090,7 @@ <&hpdma 33 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1038,7 +1106,7 @@ <&hpdma 39 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 25>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1052,7 +1120,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 13>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1083,7 +1151,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 14>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1114,7 +1182,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 15>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1147,7 +1215,7 @@ <&hpdma 41 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 26>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1162,7 +1230,6 @@ interrupts = ; resets = <&rcc SAI1_R>; access-controllers = <&rifsc 49>; - power-domains = <&CLUSTER_PD>; status = "disabled"; sai1a: audio-controller@40290004 { @@ -1172,7 +1239,7 @@ clocks = <&rcc CK_KER_SAI1>; clock-names = "sai_ck"; dmas = <&hpdma 50 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1183,7 +1250,7 @@ clocks = <&rcc CK_KER_SAI1>; clock-names = "sai_ck"; dmas = <&hpdma 51 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1199,7 +1266,6 @@ interrupts = ; resets = <&rcc SAI2_R>; access-controllers = <&rifsc 50>; - power-domains = <&CLUSTER_PD>; status = "disabled"; sai2a: audio-controller@402a0004 { @@ -1209,7 +1275,7 @@ clocks = <&rcc CK_KER_SAI2>; clock-names = "sai_ck"; dmas = <&hpdma 52 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1220,7 +1286,7 @@ clocks = <&rcc CK_KER_SAI2>; clock-names = "sai_ck"; dmas = <&hpdma 53 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1236,7 +1302,6 @@ interrupts = ; resets = <&rcc SAI3_R>; access-controllers = <&rifsc 51>; - power-domains = <&CLUSTER_PD>; status = "disabled"; sai3a: audio-controller@402b0004 { @@ -1246,7 +1311,7 @@ clocks = <&rcc CK_KER_SAI3>; clock-names = "sai_ck"; dmas = <&hpdma 54 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1257,7 +1322,7 @@ clocks = <&rcc CK_KER_SAI3>; clock-names = "sai_ck"; dmas = <&hpdma 55 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1265,13 +1330,14 @@ usart1: serial@40330000 { compatible = "st,stm32h7-uart"; reg = <0x40330000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_USART1>; - dmas = <&hpdma 9 0x40 0x12>, + dmas = <&hpdma 9 0x40 0x10012>, <&hpdma 10 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 31>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; @@ -1286,7 +1352,6 @@ interrupts = ; resets = <&rcc SAI4_R>; access-controllers = <&rifsc 52>; - power-domains = <&CLUSTER_PD>; status = "disabled"; sai4a: audio-controller@40340004 { @@ -1296,7 +1361,7 @@ clocks = <&rcc CK_KER_SAI4>; clock-names = "sai_ck"; dmas = <&hpdma 56 0x63 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1307,7 +1372,7 @@ clocks = <&rcc CK_KER_SAI4>; clock-names = "sai_ck"; dmas = <&hpdma 57 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1324,7 +1389,7 @@ resets = <&rcc MDF1_R>; reset-names = "mdf"; access-controllers = <&rifsc 54>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; sitf0: sitf@80 { @@ -1395,12 +1460,13 @@ uart7: serial@40370000 { compatible = "st,stm32h7-uart"; reg = <0x40370000 0x0 0x400>; - interrupts = ; + interrupts-extended = <&exti1 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_UART7>; dmas = <&hpdma 21 0x40 0x12>, <&hpdma 22 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 37>; + wakeup-source; status = "disabled"; }; @@ -1415,6 +1481,7 @@ clocks = <&scmi_clk CK_SCMI_OSPI1>; resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>; access-controllers = <&rifsc 74>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1428,6 +1495,7 @@ dmas = <&hpdma 105 0x60 0x3012>; dma-names = "tx"; access-controllers = <&rifsc 88>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1436,6 +1504,7 @@ reg = <0x404c0000 0x0 0x400>; clocks = <&rcc CK_BUS_CRC>; access-controllers = <&rifsc 109>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1450,6 +1519,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 58>; + power-domains = <&d1_pd>; status = "disabled"; adc1: adc@0 { @@ -1463,6 +1533,8 @@ dmas = <&hpdma 58 0x40 0x12>; dma-names = "rx"; st,adc-trigger-sel = <0>; + nvmem-cells = <&vrefint>; + nvmem-cell-names = "vrefint"; status = "disabled"; channel@14 { @@ -1483,6 +1555,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 59>; + power-domains = <&d1_pd>; status = "disabled"; adc2: adc@0 { @@ -1496,6 +1569,8 @@ dmas = <&hpdma 59 0x40 0x12>; dma-names = "rx"; st,adc-trigger-sel = <1>; + nvmem-cells = <&vrefint>; + nvmem-cell-names = "vrefint"; status = "disabled"; channel@14 { @@ -1513,16 +1588,51 @@ }; }; + hash2: hash@42010000 { + compatible = "st,stm32mp13-hash"; + reg = <0x42010000 0x0 0x400>; + interrupts = ; + clocks = <&rcc CK_BUS_HASH2>; + resets = <&rcc HASH2_R>; + dmas = <&hpdma 142 0x40 0x3021>; + dma-names = "in"; + access-controllers = <&rifsc 97>; + power-domains = <&d1_pd>; + status = "disabled"; + }; + + rng2: rng@42020000 { + compatible = "st,stm32mp21-rng"; + reg = <0x42020000 0x0 0x400>; + clocks = <&clk_rcbsec>, <&rcc CK_BUS_RNG2>; + clock-names = "rng_clk", "rng_hclk"; + resets = <&rcc RNG2_R>; + access-controllers = <&rifsc 93>; + power-domains = <&d1_pd>; + status = "disabled"; + }; + hash1: hash@42030400 { compatible = "st,stm32mp13-hash"; reg = <0x42030400 0x0 0x400>; - interrupts = ; + interrupts = ; clocks = <&rcc CK_BUS_HASH1>; resets = <&rcc HASH1_R>; dmas = <&hpdma 6 0x40 0x3021>; dma-names = "in"; access-controllers = <&rifsc 96>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + status = "disabled"; + }; + + rng1: rng@42030800 { + compatible = "st,stm32mp21-rng"; + reg = <0x42030800 0x0 0x400>; + clocks = <&clk_rcbsec>, <&rcc CK_BUS_RNG1>; + clock-names = "rng_clk", "rng_hclk"; + resets = <&rcc RNG1_R>; + access-controllers = <&rifsc 92>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1558,7 +1668,7 @@ <&hpdma 43 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 27>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1566,7 +1676,7 @@ compatible = "st,stm32mp25-i2c"; reg = <0x46040000 0x0 0x400>; interrupt-names = "event"; - interrupts = ; + interrupts = ; clocks = <&rcc CK_KER_I2C3>; resets = <&rcc I2C3_R>; #address-cells = <1>; @@ -1575,7 +1685,7 @@ <&hpdma 30 0x40 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 43>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1584,28 +1694,16 @@ #size-cells = <0>; compatible = "st,stm32-i3c"; reg = <0x46080000 0x0 0x400>; - interrupts = ; + interrupts = ; clocks = <&rcc CK_KER_I3C3>; resets = <&rcc I3C3_R>; access-controllers = <&rifsc 116>; - power-domains = <&CLUSTER_PD>; - status = "disabled"; - }; - - csi: csi@48020000 { - compatible = "st,stm32mp25-csi"; - reg = <0x48020000 0x0 0x2000>; - interrupts = ; - resets = <&rcc CSI_R>; - clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>, - <&rcc CK_KER_CSIPHY>; - clock-names = "pclk", "txesc", "csi2phy"; - access-controllers = <&rifsc 86>; + power-domains = <&d1_pd>; status = "disabled"; }; lptimer3: timer@46050000 { - compatible = "st,stm32mp21-lptimer"; + compatible = "st,stm32mp21-lptimer", "st,stm32-lptimer"; reg = <0x46050000 0x0 0x400>; interrupts-extended = <&exti2 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM3>; @@ -1617,30 +1715,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp21-lptimer-counter"; + compatible = "st,stm32mp21-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp21-pwm-lp"; + compatible = "st,stm32mp21-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp21-lptimer-timer"; + compatible = "st,stm32mp21-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@2 { - compatible = "st,stm32mp21-lptimer-trigger"; + compatible = "st,stm32mp21-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <2>; status = "disabled"; }; }; lptimer4: timer@46060000 { - compatible = "st,stm32mp21-lptimer"; + compatible = "st,stm32mp21-lptimer", "st,stm32-lptimer"; reg = <0x46060000 0x0 0x400>; interrupts-extended = <&exti2 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM4>; @@ -1652,30 +1750,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp21-lptimer-counter"; + compatible = "st,stm32mp21-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp21-pwm-lp"; + compatible = "st,stm32mp21-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp21-lptimer-timer"; + compatible = "st,stm32mp21-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@3 { - compatible = "st,stm32mp21-lptimer-trigger"; + compatible = "st,stm32mp21-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <3>; status = "disabled"; }; }; lptimer5: timer@46070000 { - compatible = "st,stm32mp21-lptimer"; + compatible = "st,stm32mp21-lptimer", "st,stm32-lptimer"; reg = <0x46070000 0x0 0x400>; interrupts-extended = <&exti2 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM5>; @@ -1687,23 +1785,23 @@ status = "disabled"; counter { - compatible = "st,stm32mp21-lptimer-counter"; + compatible = "st,stm32mp21-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp21-pwm-lp"; + compatible = "st,stm32mp21-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp21-lptimer-timer"; + compatible = "st,stm32mp21-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@4 { - compatible = "st,stm32mp21-lptimer-trigger"; + compatible = "st,stm32mp21-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <4>; status = "disabled"; }; @@ -1728,9 +1826,10 @@ resets = <&rcc SDMMC1_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 76>; st,syscfg-arcr = <&syscfg 0x40c 0x1>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1744,9 +1843,10 @@ resets = <&rcc SDMMC2_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 77>; st,syscfg-arcr = <&syscfg 0x80c 0x1>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1760,9 +1860,10 @@ resets = <&rcc SDMMC3_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 78>; st,syscfg-arcr = <&syscfg 0xc0c 0x1>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1773,47 +1874,54 @@ #size-cells = <1>; ranges = <0x482e0000 0x482e0000 0x20000>; access-controllers = <&rifsc 63>; + power-domains = <&d1_pd>; + wakeup-source; + interrupts-extended = <&exti1 43 IRQ_TYPE_EDGE_RISING>; status = "disabled"; usbh_ohci: usb@482e0000 { compatible = "generic-ohci"; reg = <0x482e0000 0x1000>; - clocks = <&rcc CK_BUS_USBHOHCI>; + clocks = <&usb2_phy1>, <&rcc CK_BUS_USBHOHCI>; resets = <&rcc USBH_R>; interrupts = ; phys = <&usb2_phy1>; phy-names = "usb"; + wakeup-source; }; usbh_ehci: usb@482f0000 { compatible = "generic-ehci"; reg = <0x482f0000 0x1000>; - clocks = <&rcc CK_BUS_USBHEHCI>; + clocks = <&usb2_phy1>, <&rcc CK_BUS_USBHEHCI>; resets = <&rcc USBH_R>; interrupts = ; companion = <&usbh_ohci>; phys = <&usb2_phy1>; phy-names = "usb"; + wakeup-source; }; }; usbotg_hs: usb@48300000 { compatible = "st,stm32mp21-hsotg", "snps,dwc2"; reg = <0x48300000 0x0 0x10000>; - clocks = <&rcc CK_BUS_OTG>; - clock-names = "otg"; + clocks = <&rcc CK_BUS_OTG>, <&usb2_phy2>; + clock-names = "otg", "utmi"; resets = <&rcc OTG_R>; reset-names = "dwc2"; interrupts = ; access-controllers = <&rifsc 66>; - g-rx-fifo-size = <1024>; + g-rx-fifo-size = <512>; g-np-tx-fifo-size = <64>; - g-tx-fifo-size = <512 16 16 16 16 16 16 16>; + g-tx-fifo-size = <512 512 16 16 16 16 16 16>; dr_mode = "otg"; otg-rev = <0x200>; phys = <&usb2_phy2>; phy-names = "usb2-phy"; st,syscfg = <&syscfg 0x2824>; + power-domains = <&d1_pd>; + wakeup-source; status = "disabled"; }; }; @@ -1881,6 +1989,10 @@ reg = <0x24 0x4>; }; + vrefint: vrefin-cal@1b8 { + reg = <0x1b8 0x2>; + }; + package_otp@1e8 { reg = <0x1e8 0x1>; bits = <0 3>; @@ -1988,6 +2100,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x44220000 0x0 0x400>; + power-domains = <&ret_pd>; interrupts-extended = <&intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, /* EXTI_0 */ <&intc GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, @@ -2310,6 +2423,15 @@ #size-cells = <1>; compatible = "st,stm32mp215-z-pinctrl"; ranges = <0 0x46200000 0x400>; + interrupts-extended = + <&exti1 0 0>, <&exti1 1 0>, <&exti1 2 0>, <&exti1 3 0>, + <&exti1 4 0>, <&exti1 5 0>, <&exti1 6 0>, <&exti1 7 0>, + <&exti1 8 0>, <&exti1 9 0>, <&exti1 10 0>, <&exti1 11 0>, + <&exti1 12 0>, <&exti1 13 0>, <&exti1 14 0>, <&exti1 15 0>, + <&exti2 0 0>, <&exti2 1 0>, <&exti2 2 0>, <&exti2 3 0>, + <&exti2 4 0>, <&exti2 5 0>, <&exti2 6 0>, <&exti2 7 0>, + <&exti2 8 0>, <&exti2 9 0>, <&exti2 10 0>, <&exti2 11 0>, + <&exti2 12 0>, <&exti2 13 0>, <&exti2 14 0>, <&exti2 15 0>; gpioz: gpio@46200000 { gpio-controller; @@ -2336,6 +2458,7 @@ #size-cells = <1>; clocks = <&scmi_clk CK_SCMI_FMC>; resets = <&scmi_reset RST_SCMI_FMC>; + power-domains = <&d1_pd>; status = "disabled"; nand-controller@4,0 { @@ -2584,13 +2707,14 @@ ranges = <0x0 0x0 0x0 0x80000000>; dcmipp: dcmipp@48030000 { - compatible = "st,stm32mp25-dcmipp"; + compatible = "st,stm32mp21-dcmipp"; reg = <0x48030000 0x1000>; interrupts = ; resets = <&rcc DCMIPP_R>; clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>; clock-names = "kclk", "mclk"; access-controllers = <&rifsc 87>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2622,7 +2746,7 @@ snps,axi-config = <&stmmac_axi_config_1>; snps,tso; access-controllers = <&rifsc 60>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_1>; @@ -2684,6 +2808,8 @@ interrupts = ; nvmem-cells = <&rsc_tbl_addr>, <&rsc_tbl_size>; nvmem-cell-names = "rsc-tbl-addr", "rsc-tbl-size"; + power-domains = <&cluster_pd>, <&ret_pd>; + power-domain-names = "default", "sleep"; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp213.dtsi b/arch/arm/dts/stm32mp213.dtsi index fc9bd0c83198..710e8e44ce03 100644 --- a/arch/arm/dts/stm32mp213.dtsi +++ b/arch/arm/dts/stm32mp213.dtsi @@ -35,7 +35,7 @@ snps,axi-config = <&stmmac_axi_config_2>; snps,tso; access-controllers = <&rifsc 61>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_2>; @@ -76,7 +76,7 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -91,7 +91,7 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp215.dtsi b/arch/arm/dts/stm32mp215.dtsi index 8f25051bfe13..7d2cbce154c9 100644 --- a/arch/arm/dts/stm32mp215.dtsi +++ b/arch/arm/dts/stm32mp215.dtsi @@ -5,6 +5,20 @@ */ #include "stm32mp213.dtsi" +&soc0 { + csi: csi@48020000 { + compatible = "st,stm32mp25-csi"; + reg = <0x48020000 0x0 0x2000>; + interrupts = ; + resets = <&rcc CSI_R>; + clocks = <&rcc CK_KER_CSI>, <&rcc CK_KER_CSITXESC>, + <&rcc CK_KER_CSIPHY>; + clock-names = "pclk", "txesc", "csi2phy"; + access-controllers = <&rifsc 86>; + status = "disabled"; + }; +}; + &soc1 { ltdc: display-controller@48010000 { compatible = "st,stm32mp21-ltdc"; @@ -15,7 +29,7 @@ clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>; clock-names = "bus", "lcd"; resets = <&rcc LTDC_R>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; access-controllers = <&rifsc 80>; access-controller-names = "cmn"; @@ -28,9 +42,5 @@ access-controllers = <&rifsc 120>; access-controller-names = "l3"; }; - rot { - access-controllers = <&rifsc 121>; - access-controller-names = "rot"; - }; }; }; diff --git a/arch/arm/dts/stm32mp215f-dk-ca35tdcid-resmem.dtsi b/arch/arm/dts/stm32mp215f-dk-ca35tdcid-resmem.dtsi index 372ee9961b92..37aa458f644e 100644 --- a/arch/arm/dts/stm32mp215f-dk-ca35tdcid-resmem.dtsi +++ b/arch/arm/dts/stm32mp215f-dk-ca35tdcid-resmem.dtsi @@ -42,8 +42,18 @@ no-map; }; - cm33_sram1: cm33-sram1@a061000 { - reg = <0x0 0xa061000 0x0 0x8000>; + scmi_cid2_s: scmi-cid2-s@a061000 { + reg = <0x0 0xa061000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_ns: scmi-cid2-ns@a062000 { + reg = <0x0 0xa062000 0x0 0x1000>; + no-map; + }; + + cm33_sram1: cm33-sram1@a063000 { + reg = <0x0 0xa063000 0x0 0xd000>; no-map; }; @@ -134,13 +144,8 @@ no-map; }; - ltdc_sec_layer: ltdc-sec-layer@fe800000 { - reg = <0x0 0xfe800000 0x0 0x800000>; - no-map; - }; - - ltdc_sec_rotation: ltdc-sec-rotation@ff000000 { - reg = <0x0 0xff000000 0x0 0x1000000>; + ltdc_sec_layer: ltdc-sec-layer@ff800000 { + reg = <0x0 0xff800000 0x0 0x800000>; no-map; }; diff --git a/arch/arm/dts/stm32mp215f-dk.dts b/arch/arm/dts/stm32mp215f-dk.dts index 98e548a035c1..4a426bc00597 100644 --- a/arch/arm/dts/stm32mp215f-dk.dts +++ b/arch/arm/dts/stm32mp215f-dk.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include "stm32mp215.dtsi" #include "stm32mp21xf.dtsi" #include "stm32mp21-pinctrl.dtsi" @@ -52,6 +53,7 @@ compatible = "dmic-codec"; #sound-dai-cells = <1>; sound-name-prefix = "dmic0"; + vref-supply = <&scmi_v3v3>; status = "okay"; port { @@ -65,6 +67,7 @@ compatible = "dmic-codec"; #sound-dai-cells = <1>; sound-name-prefix = "dmic1"; + vref-supply = <&scmi_v3v3>; status = "okay"; port { @@ -95,6 +98,7 @@ label = "wake-up"; linux,code = ; interrupts-extended = <&optee 0>; + wakeup-source; status = "okay"; }; }; @@ -130,6 +134,7 @@ backlight = <&panel_backlight>; power-supply = <&scmi_v3v3>; data-mapping = "bgr666"; + default-on; status = "okay"; width-mm = <105>; @@ -164,66 +169,79 @@ dais = <&mdf1_port0 &mdf1_port1>; status = "okay"; }; -}; - -&a35ss_syscfg { - status = "okay"; -}; - -&arm_wdt { - timeout-sec = <32>; - status = "okay"; -}; - -&crc { - status = "okay"; -}; - -&cryp1 { - status = "okay"; -}; - -&cs_cpu_debug0 { - status = "okay"; -}; - -&cs_cti0 { - status = "okay"; -}; -&cs_cti1 { - status = "okay"; -}; + typec { + compatible = "adc-usb-c-connector"; + io-channels = <&vdiv_cc1>, <&vdiv_cc2>; + io-channel-names = "cc1", "cc2"; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "device"; + power-role = "sink"; + port { + usb_c_port: endpoint { + remote-endpoint = <&usb_c_device_port>; + }; + }; + }; + }; -&cs_cti_cpu0 { - status = "okay"; -}; + vdiv_cc1: voltage-divider-cc1 { + compatible = "voltage-divider"; + #io-channel-cells = <0>; + io-channels = <&adc1 0>; + output-ohms = <3900>; + full-ohms = <5100>; + }; -&cs_etf { - status = "okay"; -}; + vdiv_cc2: voltage-divider-cc2 { + compatible = "voltage-divider"; + #io-channel-cells = <0>; + io-channels = <&adc1 1>; + output-ohms = <3900>; + full-ohms = <5100>; + }; -&cs_etm0 { - status = "okay"; + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; + }; }; -&cs_etr { +&adc_1 { + /* No pinctrl for ANA0 and ANA1 dedicated pins (channels 0 and 1) */ + vdda-supply = <&scmi_vdda18adc>; + vref-supply = <&scmi_vdda_1v8>; status = "okay"; + adc1: adc@0 { + status = "okay"; + channel@0 { + reg = <0>; + st,min-sample-time-ns = <100>; + }; + channel@1{ + reg = <1>; + st,min-sample-time-ns = <100>; + }; + }; }; -&cs_funnel { +&a35ss_syscfg { status = "okay"; }; -&cs_replicator { +&arm_wdt { + timeout-sec = <32>; status = "okay"; }; -&cs_stm { +&crc { status = "okay"; }; -&cs_tpiu { +&cryp1 { status = "okay"; }; @@ -238,7 +256,7 @@ reg = <0>; csi_sink: endpoint { remote-endpoint = <&imx335_ep>; - data-lanes = <0 1>; + data-lanes = <1 2>; bus-type = <4>; }; }; @@ -274,6 +292,7 @@ phy-mode = "rmii"; max-speed = <100>; phy-handle = <&phy0_eth1>; + phy-supply = <&scmi_v3v3>; st,ext-phyclk; mdio1 { @@ -291,10 +310,27 @@ }; }; +&hpdma { + memory-region = <&hpdma1_lli>; + lli-bus-interface = <1>; +}; + +&hpdma2 { + memory-region = <&hpdma2_lli>; + lli-bus-interface = <1>; +}; + +&hpdma3 { + memory-region = <&hpdma3_lli>; + lli-bus-interface = <1>; +}; + &i2c2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_pins_a>; pinctrl-1 = <&i2c2_sleep_pins_a>; + i2c-scl-rising-time-ns = <34>; + i2c-scl-falling-time-ns = <2>; status = "okay"; goodix: goodix-ts@5d { @@ -311,13 +347,15 @@ status = "okay" ; }; - imx335: imx335@1a { + imx335: camera@1a { compatible = "sony,imx335"; reg = <0x1a>; clocks = <&clk_ext_camera>; - reset-gpios = <&gpiod 5 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; + avdd-supply = <&scmi_v3v3>; + ovdd-supply = <&scmi_v3v3>; + dvdd-supply = <&scmi_v3v3>; + reset-gpios = <&gpiod 5 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; powerdown-gpios = <&gpiod 0 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; - status = "okay"; port { imx335_ep: endpoint { @@ -350,6 +388,14 @@ status = "okay"; }; +/* use LPTIMER with tick broadcast for suspend mode */ +&lptimer3 { + status = "okay"; + timer { + status = "okay"; + }; +}; + <dc { pinctrl-names = "default", "sleep"; pinctrl-0 = <<dc_pins_a>; @@ -383,16 +429,23 @@ }; filter0: filter@84 { + #address-cells = <1>; + #size-cells = <0>; st,cic-mode = <4>; st,sitf = <&sitf3 0>; st,hpf-filter-cutoff-bp = <625>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u26"; + }; + asoc_pdm0: mdf-dai { compatible = "st,stm32mp25-mdf-dai"; #sound-dai-cells = <0>; io-channels = <&filter0 0>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "okay"; mdf1_port0: port { mdf_endpoint0: endpoint { @@ -403,16 +456,23 @@ }; filter1: filter@104 { + #address-cells = <1>; + #size-cells = <0>; st,cic-mode = <4>; st,sitf = <&sitf3 1>; st,hpf-filter-cutoff-bp = <625>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u27"; + }; + asoc_pdm1: mdf-dai { compatible = "st,stm32mp25-mdf-dai"; #sound-dai-cells = <0>; io-channels = <&filter1 0>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "okay"; mdf1_port1: port { @@ -424,24 +484,31 @@ }; }; +&rtc { + st,lsco = ; + pinctrl-0 = <&rtc_out1_pins_a>; + pinctrl-names = "default"; + status = "okay"; +}; + &scmi_regu { - scmi_vddcore: regulator@5 { + scmi_vddcore: regulator@5 { reg = ; regulator-name = "vddcore"; }; - scmi_vdd3v3_usb: regulator@15 { + scmi_vdd3v3_usb: regulator@f { reg = ; regulator-name = "vdd3v3_usb"; }; - scmi_vdd_flash: regulator@16 { + scmi_vdd_flash: regulator@10 { reg = ; regulator-name = "vdd_flash"; }; - scmi_vdda_1v8: regulator@17 { + scmi_vdda_1v8: regulator@11 { reg = ; regulator-name = "vdda_1v8"; }; - scmi_v3v3: regulator@21 { + scmi_v3v3: regulator@15 { reg = ; regulator-name = "v3v3"; }; @@ -473,19 +540,36 @@ &sdmmc2 { pinctrl-names = "default", "opendrain", "sleep"; - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; - non-removable; - no-sd; - no-sdio; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; st,neg-edge; - bus-width = <8>; + cap-sdio-irq; + bus-width = <4>; vmmc-supply = <&scmi_v3v3>; vqmmc-supply = <&scmi_vddio2>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - status = "okay"; + mmc-pwrseq = <&wifi_pwrseq>; + #address-cells = <1>; + #size-cells = <0>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + status = "disabled"; +}; + +&sdmmc3 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc3_b4_pins_a>; + pinctrl-1 = <&sdmmc3_b4_od_pins_a>; + pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&scmi_v3v3>; + status = "disabled"; }; &spi1 { @@ -535,6 +619,7 @@ }; &usb2_phy2 { + vdda18-supply = <&scmi_vdda_1v8>; vdd33-supply = <&scmi_vdd3v3_usb>; status = "okay"; }; @@ -544,4 +629,9 @@ dr_mode = "peripheral"; usb-role-switch; status = "okay"; + port { + usb_c_device_port: endpoint { + remote-endpoint = <&usb_c_port>; + }; + }; }; diff --git a/arch/arm/dts/stm32mp21xc.dtsi b/arch/arm/dts/stm32mp21xc.dtsi index 0471458af417..38f07c939e39 100644 --- a/arch/arm/dts/stm32mp21xc.dtsi +++ b/arch/arm/dts/stm32mp21xc.dtsi @@ -15,6 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 98>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp21xf.dtsi b/arch/arm/dts/stm32mp21xf.dtsi index 0471458af417..38f07c939e39 100644 --- a/arch/arm/dts/stm32mp21xf.dtsi +++ b/arch/arm/dts/stm32mp21xf.dtsi @@ -15,6 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 98>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp23-u-boot.dtsi b/arch/arm/dts/stm32mp23-u-boot.dtsi index 0f9c40529049..cde152eb7df1 100644 --- a/arch/arm/dts/stm32mp23-u-boot.dtsi +++ b/arch/arm/dts/stm32mp23-u-boot.dtsi @@ -14,8 +14,6 @@ gpio6 = &gpiog; gpio7 = &gpioh; gpio8 = &gpioi; - gpio9 = &gpioj; - gpio10 = &gpiok; gpio25 = &gpioz; pinctrl0 = &pinctrl; pinctrl1 = &pinctrl_z; @@ -89,14 +87,6 @@ bootph-all; }; -&gpioj { - bootph-all; -}; - -&gpiok { - bootph-all; -}; - &gpioz { bootph-all; }; diff --git a/arch/arm/dts/stm32mp231.dtsi b/arch/arm/dts/stm32mp231.dtsi index 08b816a70ed6..27d6e4aac8c8 100644 --- a/arch/arm/dts/stm32mp231.dtsi +++ b/arch/arm/dts/stm32mp231.dtsi @@ -25,7 +25,7 @@ enable-method = "psci"; clocks = <&scmi_perf 0>; clock-names = "cpu"; - power-domains = <&CPU_PD0>; + power-domains = <&cpu0_pd>; power-domain-names = "psci"; #cooling-cells = <2>; }; @@ -37,8 +37,8 @@ compatible = "arm,idle-state"; arm,psci-suspend-param = <0x00000001>; local-timer-stop; - entry-latency-us = <300>; - exit-latency-us = <500>; + entry-latency-us = <150>; + exit-latency-us = <200>; min-residency-us = <1000>; }; }; @@ -47,25 +47,25 @@ STOP1: domain-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x00000011>; - entry-latency-us = <400>; - exit-latency-us = <1200>; + entry-latency-us = <300>; + exit-latency-us = <500>; min-residency-us = <1500>; }; LP_STOP1: domain-lp-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x0000021>; - entry-latency-us = <500>; - exit-latency-us = <2000>; - min-residency-us = <3000>; + entry-latency-us = <3500>; + exit-latency-us = <600>; + min-residency-us = <2000>; }; LPLV_STOP1: domain-lplv-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x00000211>; entry-latency-us = <500>; - exit-latency-us = <3000>; - min-residency-us = <4000>; + exit-latency-us = <2000>; + min-residency-us = <2500>; }; }; }; @@ -198,7 +198,7 @@ }; intc: interrupt-controller@4ac00000 { - compatible = "arm,cortex-a7-gic"; + compatible = "st,stm32mp2-cortex-a7-gic", "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; interrupt-parent = <&intc>; @@ -219,23 +219,29 @@ }; }; + d1_pd: power-domain-d1 { + compatible = "st,stm32mp-pm-domain"; + #power-domain-cells = <0>; + power-domains = <&cluster_pd>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: power-domain-cpu0 { + cpu0_pd: power-domain-cpu0 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + power-domains = <&cluster_pd>; }; - CLUSTER_PD: power-domain-cluster { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; domain-idle-states = <&STOP1>, <&LP_STOP1>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; }; - RET_PD: power-domain-retention { + ret_pd: power-domain-retention { #power-domain-cells = <0>; domain-idle-states = <&LPLV_STOP1>; }; @@ -341,7 +347,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA1>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -366,7 +372,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA2>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -391,7 +397,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA3>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -418,7 +424,7 @@ resets = <&rcc OSPIIOM_R>; st,syscfg-amcr = <&syscfg 0x2c00 0x7>; access-controllers = <&rifsc 111>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; ranges = <0 0 0x40430000 0x400>, <1 0 0x40440000 0x400>; @@ -434,7 +440,7 @@ clocks = <&scmi_clk CK_SCMI_OSPI1>; resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>; access-controllers = <&rifsc 74>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -449,7 +455,7 @@ clocks = <&scmi_clk CK_SCMI_OSPI2>; resets = <&scmi_reset RST_SCMI_OSPI2>, <&scmi_reset RST_SCMI_OSPI2DLL>; access-controllers = <&rifsc 75>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -473,7 +479,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 1>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -504,7 +510,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 2>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -535,7 +541,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 3>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -566,7 +572,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 4>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -597,7 +603,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 5>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -622,7 +628,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 6>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -647,7 +653,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 10>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -678,7 +684,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 11>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -709,7 +715,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -731,7 +737,7 @@ }; lptimer1: timer@40090000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x40090000 0x400>; interrupts-extended = <&exti1 47 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM1>; @@ -739,35 +745,35 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 17>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@0 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <0>; status = "disabled"; }; }; lptimer2: timer@400a0000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x400a0000 0x400>; interrupts-extended = <&exti1 48 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM2>; @@ -775,28 +781,28 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 18>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@1 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <1>; status = "disabled"; }; @@ -814,7 +820,7 @@ <&hpdma 52 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -830,7 +836,7 @@ <&hpdma 52 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -846,7 +852,7 @@ <&hpdma 54 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -862,7 +868,7 @@ <&hpdma 54 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -889,7 +895,7 @@ <&hpdma 12 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 32>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -903,7 +909,7 @@ <&hpdma 14 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 33>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -917,7 +923,7 @@ <&hpdma 16 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 34>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -931,7 +937,7 @@ <&hpdma 18 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 35>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -949,7 +955,7 @@ <&hpdma 28 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 41>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -966,7 +972,7 @@ <&hpdma 31 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 42>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -983,7 +989,7 @@ <&hpdma 46 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 47>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -996,7 +1002,7 @@ clocks = <&rcc CK_KER_I3C1>; resets = <&rcc I3C1_R>; access-controllers = <&rifsc 114>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1009,7 +1015,7 @@ clocks = <&rcc CK_KER_I3C2>; resets = <&rcc I3C2_R>; access-controllers = <&rifsc 115>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1023,7 +1029,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 8>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1054,7 +1060,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 9>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1088,7 +1094,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 0>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -1122,7 +1128,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 7>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -1152,7 +1158,7 @@ <&hpdma 20 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 36>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1169,7 +1175,7 @@ <&hpdma 50 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1185,7 +1191,7 @@ <&hpdma 50 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1201,7 +1207,7 @@ <&hpdma 56 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 25>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1215,7 +1221,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 13>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1246,7 +1252,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 14>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1277,7 +1283,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 15>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1310,7 +1316,7 @@ <&hpdma 58 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 26>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1334,7 +1340,7 @@ clocks = <&rcc CK_KER_SAI1>; clock-names = "sai_ck"; dmas = <&hpdma 73 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1345,7 +1351,7 @@ clocks = <&rcc CK_KER_SAI1>; clock-names = "sai_ck"; dmas = <&hpdma 74 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1370,7 +1376,7 @@ clocks = <&rcc CK_KER_SAI2>; clock-names = "sai_ck"; dmas = <&hpdma 75 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1381,7 +1387,7 @@ clocks = <&rcc CK_KER_SAI2>; clock-names = "sai_ck"; dmas = <&hpdma 76 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1406,7 +1412,7 @@ clocks = <&rcc CK_KER_SAI3>; clock-names = "sai_ck"; dmas = <&hpdma 77 0x43 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1417,7 +1423,7 @@ clocks = <&rcc CK_KER_SAI3>; clock-names = "sai_ck"; dmas = <&hpdma 78 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1431,7 +1437,7 @@ <&hpdma 10 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 31>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1456,7 +1462,7 @@ clocks = <&rcc CK_KER_SAI4>; clock-names = "sai_ck"; dmas = <&hpdma 79 0x63 0x21>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1467,7 +1473,7 @@ clocks = <&rcc CK_KER_SAI4>; clock-names = "sai_ck"; dmas = <&hpdma 80 0x43 0x12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1481,7 +1487,7 @@ <&hpdma 22 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 37>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1496,7 +1502,7 @@ dmas = <&hpdma 137 0x60 0x00003012>; dma-names = "tx"; access-controllers = <&rifsc 88>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1505,7 +1511,7 @@ reg = <0x404c0000 0x400>; clocks = <&rcc CK_BUS_CRC>; access-controllers = <&rifsc 109>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1521,7 +1527,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 58>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; adc1: adc@0 { @@ -1578,7 +1584,7 @@ }; mdf1: mdf@404d0000 { - compatible = "st,stm32mp25-mdf"; + compatible = "st,stm32mp23-mdf"; ranges = <0 0x404d0000 0x1000>; reg = <0x404d0000 0x8>, <0x404d0ff0 0x10>; #address-cells = <1>; @@ -1589,7 +1595,7 @@ resets = <&rcc MDF1_R>; reset-names = "mdf"; access-controllers = <&rifsc 54>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; sitf0: sitf@80 { @@ -1668,7 +1674,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 59>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; adc3: adc@0 { @@ -1713,7 +1719,7 @@ dmas = <&hpdma 6 0x40 0x3021>; dma-names = "in"; access-controllers = <&rifsc 95>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1724,7 +1730,7 @@ clock-names = "rng_clk", "rng_hclk"; resets = <&rcc RNG_R>; access-controllers = <&rifsc 92>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1760,7 +1766,7 @@ <&hpdma 172 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 29>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1790,12 +1796,12 @@ <&hpdma 169 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 48>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; lptimer3: timer@46050000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46050000 0x400>; interrupts-extended = <&exti2 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM3>; @@ -1807,30 +1813,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@2 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <2>; status = "disabled"; }; }; lptimer4: timer@46060000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46060000 0x400>; interrupts-extended = <&exti2 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM4>; @@ -1842,30 +1848,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@3 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <3>; status = "disabled"; }; }; lptimer5: timer@46070000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46070000 0x400>; interrupts-extended = <&exti2 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM5>; @@ -1877,23 +1883,23 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@4 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <4>; status = "disabled"; }; @@ -1908,7 +1914,7 @@ clocks = <&rcc CK_KER_I3C4>; resets = <&rcc I3C4_R>; access-controllers = <&rifsc 117>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1921,7 +1927,7 @@ clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>; clock-names = "bus", "lcd"; resets = <&rcc LTDC_R>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; access-controllers = <&rifsc 80>; access-controller-names = "cmn"; @@ -1960,7 +1966,7 @@ clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>; clock-names = "kclk", "mclk"; access-controllers = <&rifsc 87>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1974,9 +1980,9 @@ resets = <&rcc SDMMC1_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 76>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1990,9 +1996,9 @@ resets = <&rcc SDMMC2_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 77>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2006,9 +2012,9 @@ resets = <&rcc SDMMC3_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 78>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2040,7 +2046,7 @@ snps,axi-config = <&stmmac_axi_config_1>; snps,tso; access-controllers = <&rifsc 60>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_1>; @@ -2074,7 +2080,7 @@ #size-cells = <1>; ranges = <0x482e0000 0x482e0000 0x20000>; access-controllers = <&rifsc 63>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; interrupts-extended = <&exti1 43 IRQ_TYPE_EDGE_RISING>; status = "disabled"; @@ -2110,7 +2116,7 @@ #size-cells = <1>; ranges = <0x48300000 0x48300000 0x100000>; access-controllers = <&rifsc 66>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; interrupts-extended = <&exti1 44 IRQ_TYPE_EDGE_RISING>; status = "disabled"; @@ -2334,7 +2340,7 @@ compatible = "st,stm32mp1-exti"; interrupt-controller; #interrupt-cells = <2>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; reg = <0x44220000 0x400>; interrupts-extended = <&intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, /* EXTI_0 */ @@ -2544,28 +2550,6 @@ st,bank-name = "GPIOI"; status = "disabled"; }; - - gpioj: gpio@442d0000 { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x90000 0x400>; - clocks = <&scmi_clk CK_SCMI_GPIOJ>; - st,bank-name = "GPIOJ"; - status = "disabled"; - }; - - gpiok: gpio@442e0000 { - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0xa0000 0x400>; - clocks = <&scmi_clk CK_SCMI_GPIOK>; - st,bank-name = "GPIOK"; - status = "disabled"; - }; }; rtc: rtc@46000000 { @@ -2625,6 +2609,15 @@ compatible = "st,stm32mp257-z-pinctrl"; ranges = <0 0x46200000 0x400>; interrupt-parent = <&exti1>; + interrupts-extended = + <&exti1 0 0>, <&exti1 1 0>, <&exti1 2 0>, <&exti1 3 0>, + <&exti1 4 0>, <&exti1 5 0>, <&exti1 6 0>, <&exti1 7 0>, + <&exti1 8 0>, <&exti1 9 0>, <&exti1 10 0>, <&exti1 11 0>, + <&exti1 12 0>, <&exti1 13 0>, <&exti1 14 0>, <&exti1 15 0>, + <&exti2 0 0>, <&exti2 1 0>, <&exti2 2 0>, <&exti2 3 0>, + <&exti2 4 0>, <&exti2 5 0>, <&exti2 6 0>, <&exti2 7 0>, + <&exti2 8 0>, <&exti2 9 0>, <&exti2 10 0>, <&exti2 11 0>, + <&exti2 12 0>, <&exti2 13 0>, <&exti2 14 0>, <&exti2 15 0>; gpioz: gpio@46200000 { gpio-controller; @@ -2737,7 +2730,7 @@ #size-cells = <1>; clocks = <&scmi_clk CK_SCMI_FMC>; resets = <&scmi_reset RST_SCMI_FMC>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; nand-controller@4,0 { @@ -3014,6 +3007,8 @@ interrupts = ; nvmem-cells = <&rsc_tbl_addr>, <&rsc_tbl_size>; nvmem-cell-names = "rsc-tbl-addr", "rsc-tbl-size"; + power-domains = <&cluster_pd>, <&ret_pd>; + power-domain-names = "default", "sleep"; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp233.dtsi b/arch/arm/dts/stm32mp233.dtsi index 952cda24cf76..0701102d846c 100644 --- a/arch/arm/dts/stm32mp233.dtsi +++ b/arch/arm/dts/stm32mp233.dtsi @@ -14,7 +14,7 @@ enable-method = "psci"; clocks = <&scmi_perf 0>; clock-names = "cpu"; - power-domains = <&CPU_PD1>; + power-domains = <&cpu1_pd>; power-domain-names = "psci"; }; }; @@ -26,10 +26,10 @@ }; psci { - CPU_PD1: power-domain-cpu1 { + cpu1_pd: power-domain-cpu1 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + power-domains = <&cluster_pd>; }; }; @@ -111,7 +111,22 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; + status = "disabled"; + }; + + m_can2: can@402e0000 { + compatible = "bosch,m_can"; + reg = <0x402e0000 0x400>, <0x40310000 0x2800>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&rcc CK_BUS_FDCAN>, <&rcc CK_KER_FDCAN>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; + access-controllers = <&rifsc 56>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -143,7 +158,7 @@ snps,axi-config = <&stmmac_axi_config_2>; snps,tso; access-controllers = <&rifsc 61>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_2>; diff --git a/arch/arm/dts/stm32mp235.dtsi b/arch/arm/dts/stm32mp235.dtsi index 06226a51f3d4..11feb1283b72 100644 --- a/arch/arm/dts/stm32mp235.dtsi +++ b/arch/arm/dts/stm32mp235.dtsi @@ -130,7 +130,7 @@ resets = <&rcc DSI_R>; reset-names = "apb"; access-controllers = <&rifsc 81>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -142,7 +142,7 @@ clock-names = "pclk", "ref", "pixclk"; resets = <&rcc LVDS_R>; access-controllers = <&rifsc 84>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -153,7 +153,7 @@ interrupts = ; clocks = <&rcc CK_BUS_VDEC>; access-controllers = <&rifsc 89>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; }; gpu: gpu@48280000 { @@ -163,7 +163,7 @@ resets = <&rcc GPU_R>; clock-names = "bus", "core"; clocks = <&rcc CK_BUS_GPU>, <&rcc CK_KER_GPU>; - power-domains = <&scmi_devpd PD_SCMI_GPU>, <&CLUSTER_PD>; + power-domains = <&scmi_devpd PD_SCMI_GPU>, <&d1_pd>; access-controllers = <&rifsc 79>; status = "disabled"; diff --git a/arch/arm/dts/stm32mp235f-dk-ca35tdcid-resmem.dtsi b/arch/arm/dts/stm32mp235f-dk-ca35tdcid-resmem.dtsi index 059fb15297a1..5d669b01cba3 100644 --- a/arch/arm/dts/stm32mp235f-dk-ca35tdcid-resmem.dtsi +++ b/arch/arm/dts/stm32mp235f-dk-ca35tdcid-resmem.dtsi @@ -42,8 +42,18 @@ no-map; }; - cm33_sram1: cm33-sram1@a041000 { - reg = <0x0 0xa041000 0x0 0x1f000>; + scmi_cid2_s: scmi-cid2-s@a041000 { + reg = <0x0 0xa041000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_ns: scmi-cid2-ns@a042000 { + reg = <0x0 0xa042000 0x0 0x1000>; + no-map; + }; + + cm33_sram1: cm33-sram1@a043000 { + reg = <0x0 0xa043000 0x0 0x1d000>; no-map; }; diff --git a/arch/arm/dts/stm32mp235f-dk.dts b/arch/arm/dts/stm32mp235f-dk.dts index c07c12d8a876..04a447ceb99a 100644 --- a/arch/arm/dts/stm32mp235f-dk.dts +++ b/arch/arm/dts/stm32mp235f-dk.dts @@ -76,6 +76,7 @@ label = "wake-up"; linux,code = ; interrupts-extended = <&optee 0>; + wakeup-source; status = "okay"; }; }; @@ -105,30 +106,6 @@ }; }; - imx335_2v9: imx335-2v9 { - compatible = "regulator-fixed"; - regulator-name = "imx335-avdd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-always-on; - }; - - imx335_1v8: imx335-1v8 { - compatible = "regulator-fixed"; - regulator-name = "imx335-ovdd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - imx335_1v2: imx335-1v2 { - compatible = "regulator-fixed"; - regulator-name = "imx335-dvdd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x80000000>; @@ -202,62 +179,6 @@ status = "okay"; }; -&cs_cpu_debug0 { - status = "okay"; -}; - -&cs_cpu_debug1 { - status = "okay"; -}; - -&cs_cti0 { - status = "okay"; -}; - -&cs_cti1 { - status = "okay"; -}; - -&cs_cti_cpu0 { - status = "okay"; -}; - -&cs_cti_cpu1 { - status = "okay"; -}; - -&cs_etf { - status = "okay"; -}; - -&cs_etm0 { - status = "okay"; -}; - -&cs_etm1 { - status = "okay"; -}; - -&cs_etr { - status = "okay"; -}; - -&cs_funnel { - status = "okay"; -}; - -&cs_replicator { - status = "okay"; -}; - -&cs_stm { - status = "okay"; -}; - -&cs_tpiu { - status = "okay"; -}; - &csi { vdd-supply = <&scmi_vddcore>; vdda18-supply = <&scmi_v1v8>; @@ -269,7 +190,7 @@ reg = <0>; csi_sink: endpoint { remote-endpoint = <&imx335_ep>; - data-lanes = <0 1>; + data-lanes = <1 2>; bus-type = <4>; }; }; @@ -371,14 +292,14 @@ /delete-property/dmas; /delete-property/dma-names; - imx335: imx335@1a { + imx335: camera@1a { compatible = "sony,imx335"; reg = <0x1a>; clocks = <&clk_ext_camera>; - avdd-supply = <&imx335_2v9>; - ovdd-supply = <&imx335_1v8>; - dvdd-supply = <&imx335_1v2>; - reset-gpios = <&gpiob 1 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; + avdd-supply = <&scmi_v3v3>; + ovdd-supply = <&scmi_v3v3>; + dvdd-supply = <&scmi_v3v3>; + reset-gpios = <&gpiob 1 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; powerdown-gpios = <&gpiob 11 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; status = "okay"; @@ -481,6 +402,7 @@ /* use LPTIMER with tick broadcast for suspend mode */ &lptimer3 { + clocks = <&rcc CK_LPTIM3_AM>; status = "okay"; timer { status = "okay"; @@ -591,35 +513,35 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; - scmi_vddcore: regulator@11 { + scmi_vddcore: regulator@b { reg = ; regulator-name = "vddcore"; }; - scmi_v1v8: regulator@14 { + scmi_v1v8: regulator@e { reg = ; regulator-name = "v1v8"; }; - scmi_v3v3: regulator@16 { + scmi_v3v3: regulator@10 { reg = ; regulator-name = "v3v3"; }; - scmi_vdd_emmc: regulator@18 { + scmi_vdd_emmc: regulator@12 { reg = ; regulator-name = "vdd_emmc"; }; - scmi_vdd3v3_usb: regulator@20 { + scmi_vdd3v3_usb: regulator@14 { reg = ; regulator-name = "vdd3v3_usb"; }; - scmi_v5v_hdmi: regulator@21 { + scmi_v5v_hdmi: regulator@15 { reg = ; regulator-name = "v5v_hdmi"; }; - scmi_v5v_vconn: regulator@22 { + scmi_v5v_vconn: regulator@16 { reg = ; regulator-name = "v5v_vconn"; }; - scmi_vdd_sdcard: regulator@23 { + scmi_vdd_sdcard: regulator@17 { reg = ; regulator-name = "vdd_sdcard"; }; @@ -657,6 +579,7 @@ vmmc-supply = <&scmi_vdd_emmc>; vqmmc-supply = <&scmi_vddio2>; mmc-ddr-1_8v; + mmc-hs200-1_8v; status = "okay"; }; @@ -695,7 +618,7 @@ bluetooth { shutdown-gpios = <&gpiog 4 GPIO_ACTIVE_HIGH>; compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; + max-speed = <2000000>; vbat-supply = <&scmi_v3v3>; vddio-supply = <&scmi_v3v3>; }; diff --git a/arch/arm/dts/stm32mp23xc.dtsi b/arch/arm/dts/stm32mp23xc.dtsi index f3d5cb3a063c..fd100642fa50 100644 --- a/arch/arm/dts/stm32mp23xc.dtsi +++ b/arch/arm/dts/stm32mp23xc.dtsi @@ -15,7 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 96>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp23xf.dtsi b/arch/arm/dts/stm32mp23xf.dtsi index f3d5cb3a063c..fd100642fa50 100644 --- a/arch/arm/dts/stm32mp23xf.dtsi +++ b/arch/arm/dts/stm32mp23xf.dtsi @@ -15,7 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 96>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp25-pinctrl.dtsi b/arch/arm/dts/stm32mp25-pinctrl.dtsi index a6ed7566aa4c..253a840a7aa7 100644 --- a/arch/arm/dts/stm32mp25-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp25-pinctrl.dtsi @@ -469,6 +469,21 @@ }; }; + pwm3_ch2_pins_a: pwm3-ch2-0 { + pins { + pinmux = ; /* TIM3_CH2 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm3_ch2_sleep_pins_a: pwm3-ch2-sleep-0 { + pins { + pinmux = ; /* TIM3_CH2 */ + }; + }; + rtc_out2_rmp_pins_a: rtc-out2-rmp-pins-0 { pins { pinmux = ; /* RTC_OUT2_RMP */ diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi index 5aed351f94e4..3b96eccc42ea 100644 --- a/arch/arm/dts/stm32mp251.dtsi +++ b/arch/arm/dts/stm32mp251.dtsi @@ -25,7 +25,7 @@ enable-method = "psci"; clocks = <&scmi_perf 0>; clock-names = "cpu"; - power-domains = <&CPU_PD0>; + power-domains = <&cpu0_pd>; power-domain-names = "psci"; #cooling-cells = <2>; }; @@ -37,8 +37,8 @@ compatible = "arm,idle-state"; arm,psci-suspend-param = <0x00000001>; local-timer-stop; - entry-latency-us = <300>; - exit-latency-us = <500>; + entry-latency-us = <150>; + exit-latency-us = <200>; min-residency-us = <1000>; }; }; @@ -47,25 +47,25 @@ STOP1: domain-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x00000011>; - entry-latency-us = <400>; - exit-latency-us = <1200>; + entry-latency-us = <300>; + exit-latency-us = <500>; min-residency-us = <1500>; }; LP_STOP1: domain-lp-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x0000021>; - entry-latency-us = <500>; - exit-latency-us = <2000>; - min-residency-us = <3000>; + entry-latency-us = <350>; + exit-latency-us = <600>; + min-residency-us = <2000>; }; LPLV_STOP1: domain-lplv-stop1 { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x00000211>; entry-latency-us = <500>; - exit-latency-us = <3000>; - min-residency-us = <4000>; + exit-latency-us = <2000>; + min-residency-us = <2500>; }; }; }; @@ -198,7 +198,7 @@ }; intc: interrupt-controller@4ac00000 { - compatible = "arm,cortex-a7-gic"; + compatible = "st,stm32mp2-cortex-a7-gic", "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; interrupt-parent = <&intc>; @@ -219,23 +219,29 @@ }; }; + d1_pd: power-domain-d1 { + compatible = "st,stm32mp-pm-domain"; + #power-domain-cells = <0>; + power-domains = <&cluster_pd>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: power-domain-cpu0 { + cpu0_pd: power-domain-cpu0 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + power-domains = <&cluster_pd>; }; - CLUSTER_PD: power-domain-cluster { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; domain-idle-states = <&STOP1>, <&LP_STOP1>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; }; - RET_PD: power-domain-retention { + ret_pd: power-domain-retention { #power-domain-cells = <0>; domain-idle-states = <&LPLV_STOP1>; }; @@ -341,7 +347,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA1>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -366,7 +372,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA2>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -391,7 +397,7 @@ , ; clocks = <&scmi_clk CK_SCMI_HPDMA3>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; #dma-cells = <3>; st,axi-max-burst-len = <16>; }; @@ -418,7 +424,7 @@ resets = <&rcc OSPIIOM_R>; st,syscfg-amcr = <&syscfg 0x2c00 0x7>; access-controllers = <&rifsc 111>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; ranges = <0 0 0x40430000 0x400>, <1 0 0x40440000 0x400>; @@ -434,7 +440,7 @@ clocks = <&scmi_clk CK_SCMI_OSPI1>; resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>; access-controllers = <&rifsc 74>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -449,7 +455,7 @@ clocks = <&scmi_clk CK_SCMI_OSPI2>; resets = <&scmi_reset RST_SCMI_OSPI2>, <&scmi_reset RST_SCMI_OSPI2DLL>; access-controllers = <&rifsc 75>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -473,7 +479,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 1>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -504,7 +510,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 2>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -535,7 +541,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 3>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -566,7 +572,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 4>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -597,7 +603,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 5>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -622,7 +628,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 6>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -647,7 +653,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 10>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -678,7 +684,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 11>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -709,7 +715,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 12>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -731,7 +737,7 @@ }; lptimer1: timer@40090000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x40090000 0x400>; interrupts-extended = <&exti1 47 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM1>; @@ -739,35 +745,35 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 17>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@0 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <0>; status = "disabled"; }; }; lptimer2: timer@400a0000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x400a0000 0x400>; interrupts-extended = <&exti1 48 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM2>; @@ -775,28 +781,28 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 18>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; wakeup-source; status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@1 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <1>; status = "disabled"; }; @@ -814,7 +820,7 @@ <&hpdma 52 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -830,7 +836,7 @@ <&hpdma 52 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 23>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -846,7 +852,7 @@ <&hpdma 54 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -862,7 +868,7 @@ <&hpdma 54 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 24>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -889,7 +895,7 @@ <&hpdma 12 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 32>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -903,7 +909,7 @@ <&hpdma 14 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 33>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -917,7 +923,7 @@ <&hpdma 16 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 34>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -931,7 +937,7 @@ <&hpdma 18 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 35>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -949,7 +955,7 @@ <&hpdma 28 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 41>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -966,7 +972,7 @@ <&hpdma 31 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 42>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -983,7 +989,7 @@ <&hpdma 34 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 43>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1000,7 +1006,7 @@ <&hpdma 37 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 44>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1017,7 +1023,7 @@ <&hpdma 40 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 45>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1034,7 +1040,7 @@ <&hpdma 43 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 46>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1051,7 +1057,7 @@ <&hpdma 46 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 47>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1064,7 +1070,7 @@ clocks = <&rcc CK_KER_I3C1>; resets = <&rcc I3C1_R>; access-controllers = <&rifsc 114>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1077,7 +1083,7 @@ clocks = <&rcc CK_KER_I3C2>; resets = <&rcc I3C2_R>; access-controllers = <&rifsc 115>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1090,7 +1096,7 @@ clocks = <&rcc CK_KER_I3C3>; resets = <&rcc I3C3_R>; access-controllers = <&rifsc 116>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1104,7 +1110,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 8>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1135,7 +1141,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 9>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1169,7 +1175,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 0>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -1203,7 +1209,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 7>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -1233,7 +1239,7 @@ <&hpdma 20 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 36>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1250,7 +1256,7 @@ <&hpdma 50 0x43 0x21>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1266,7 +1272,7 @@ <&hpdma 50 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 22>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1282,7 +1288,7 @@ <&hpdma 56 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 25>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1296,7 +1302,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 13>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1327,7 +1333,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 14>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1358,7 +1364,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 15>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; counter { @@ -1391,7 +1397,7 @@ <&hpdma 58 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 26>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1416,7 +1422,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 73 0x43 0x21>; dma-names = "tx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1428,7 +1434,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 74 0x43 0x12>; dma-names = "rx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1454,7 +1460,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 75 0x43 0x21>; dma-names = "tx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1466,7 +1472,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 76 0x43 0x12>; dma-names = "rx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1492,7 +1498,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 77 0x43 0x21>; dma-names = "tx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1504,7 +1510,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 78 0x43 0x12>; dma-names = "rx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1518,7 +1524,7 @@ <&hpdma 26 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 39>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1536,7 +1542,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 16>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; pwm { @@ -1566,7 +1572,7 @@ <&hpdma 10 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 31>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1592,7 +1598,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 79 0x63 0x21>; dma-names = "tx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1604,7 +1610,7 @@ clock-names = "sai_ck"; dmas = <&hpdma 80 0x43 0x12>; dma-names = "rx"; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -1621,7 +1627,7 @@ <&hpdma 60 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 27>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1637,7 +1643,7 @@ <&hpdma 62 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 28>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1650,7 +1656,7 @@ <&hpdma 22 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 37>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1664,7 +1670,7 @@ <&hpdma 24 0x20 0x3021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 38>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; }; @@ -1679,7 +1685,7 @@ dmas = <&hpdma 137 0x60 0x00003012>; dma-names = "tx"; access-controllers = <&rifsc 88>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1688,7 +1694,7 @@ reg = <0x404c0000 0x400>; clocks = <&rcc CK_BUS_CRC>; access-controllers = <&rifsc 109>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1704,7 +1710,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 58>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; adc1: adc@0 { @@ -1772,7 +1778,7 @@ resets = <&rcc MDF1_R>; reset-names = "mdf"; access-controllers = <&rifsc 54>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "disabled"; sitf0: sitf@80 { @@ -1915,7 +1921,7 @@ #address-cells = <1>; #size-cells = <0>; access-controllers = <&rifsc 59>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; adc3: adc@0 { @@ -1960,7 +1966,7 @@ dmas = <&hpdma 6 0x40 0x3021>; dma-names = "in"; access-controllers = <&rifsc 95>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -1971,7 +1977,7 @@ clock-names = "rng_clk", "rng_hclk"; resets = <&rcc RNG_R>; access-controllers = <&rifsc 92>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2007,7 +2013,7 @@ <&hpdma 172 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 29>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2038,12 +2044,12 @@ <&hpdma 169 0x20 0x00003021>; dma-names = "rx", "tx"; access-controllers = <&rifsc 48>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; lptimer3: timer@46050000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46050000 0x400>; interrupts-extended = <&exti2 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM3>; @@ -2055,30 +2061,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@2 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <2>; status = "disabled"; }; }; lptimer4: timer@46060000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46060000 0x400>; interrupts-extended = <&exti2 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM4>; @@ -2090,30 +2096,30 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@3 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <3>; status = "disabled"; }; }; lptimer5: timer@46070000 { - compatible = "st,stm32mp25-lptimer"; + compatible = "st,stm32mp25-lptimer", "st,stm32-lptimer"; reg = <0x46070000 0x400>; interrupts-extended = <&exti2 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc CK_KER_LPTIM5>; @@ -2125,23 +2131,23 @@ status = "disabled"; counter { - compatible = "st,stm32mp25-lptimer-counter"; + compatible = "st,stm32mp25-lptimer-counter", "st,stm32-lptimer-counter"; status = "disabled"; }; pwm { - compatible = "st,stm32mp25-pwm-lp"; + compatible = "st,stm32mp25-pwm-lp", "st,stm32-pwm-lp"; #pwm-cells = <3>; status = "disabled"; }; timer { - compatible = "st,stm32mp25-lptimer-timer"; + compatible = "st,stm32mp25-lptimer-timer", "st,stm32-lptimer-timer"; status = "disabled"; }; trigger@4 { - compatible = "st,stm32mp25-lptimer-trigger"; + compatible = "st,stm32mp25-lptimer-trigger", "st,stm32-lptimer-trigger"; reg = <4>; status = "disabled"; }; @@ -2156,7 +2162,7 @@ clocks = <&rcc CK_KER_I3C4>; resets = <&rcc I3C4_R>; access-controllers = <&rifsc 117>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2169,7 +2175,7 @@ clocks = <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>; clock-names = "bus", "lcd"; resets = <&rcc LTDC_R>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; access-controllers = <&rifsc 80>; access-controller-names = "cmn"; @@ -2208,7 +2214,7 @@ clocks = <&rcc CK_BUS_DCMIPP>, <&rcc CK_KER_CSI>; clock-names = "kclk", "mclk"; access-controllers = <&rifsc 87>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2222,7 +2228,7 @@ reset-names = "phy-rst"; st,syscfg = <&syscfg>; access-controllers = <&rifsc 67>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>; status = "disabled"; @@ -2238,9 +2244,9 @@ resets = <&rcc SDMMC1_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 76>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2254,9 +2260,9 @@ resets = <&rcc SDMMC2_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 77>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2270,9 +2276,9 @@ resets = <&rcc SDMMC3_R>; cap-sd-highspeed; cap-mmc-highspeed; - max-frequency = <120000000>; + max-frequency = <166000000>; access-controllers = <&rifsc 78>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2304,7 +2310,7 @@ snps,axi-config = <&stmmac_axi_config_1>; snps,tso; access-controllers = <&rifsc 60>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_1>; @@ -2338,7 +2344,7 @@ #size-cells = <1>; ranges = <0x482e0000 0x482e0000 0x20000>; access-controllers = <&rifsc 63>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; interrupts-extended = <&exti1 43 IRQ_TYPE_EDGE_RISING>; status = "disabled"; @@ -2374,7 +2380,7 @@ #size-cells = <1>; ranges = <0x48300000 0x48300000 0x100000>; access-controllers = <&rifsc 66>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; interrupts-extended = <&exti1 44 IRQ_TYPE_EDGE_RISING>; status = "disabled"; @@ -2396,9 +2402,12 @@ pcie_ep: pcie-ep@48400000 { compatible = "st,stm32mp25-pcie-ep", "snps,dw-pcie-ep"; num-lanes = <1>; - reg = <0x48400000 0x400000>, + reg = <0x48400000 0x100000>, + <0x48500000 0x100000>, + <0x48700000 0x80000>, + <0x48780000 0x80000>, <0x10000000 0x8000000>; - reg-names = "dbi", "addr_space"; + reg-names = "dbi", "dbi2", "atu", "dma", "addr_space"; st,syscfg = <&syscfg>; clocks = <&rcc CK_BUS_PCIE>; clock-names = "core"; @@ -2407,7 +2416,7 @@ phys = <&combophy PHY_TYPE_PCIE>; phy-names = "pcie-phy"; access-controllers = <&rifsc 68>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -2433,6 +2442,7 @@ ranges = <0x01000000 0 0x10010000 0x10010000 0 0x10000>, <0x02000000 0 0x10020000 0x10020000 0 0x7fe0000>, <0x42000000 0 0x18000000 0x18000000 0 0x8000000>; + dma-ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x80000000>; bus-range = <0x00 0xff>; clocks = <&rcc CK_BUS_PCIE>; clock-names = "core"; @@ -2443,7 +2453,7 @@ msi-parent = <&v2m0>; access-controllers = <&rifsc 68>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; @@ -2652,7 +2662,7 @@ compatible = "st,stm32mp1-exti"; interrupt-controller; #interrupt-cells = <2>; - power-domains = <&RET_PD>; + power-domains = <&ret_pd>; reg = <0x44220000 0x400>; interrupts-extended = <&intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, /* EXTI_0 */ @@ -2943,6 +2953,15 @@ compatible = "st,stm32mp257-z-pinctrl"; ranges = <0 0x46200000 0x400>; interrupt-parent = <&exti1>; + interrupts-extended = + <&exti1 0 0>, <&exti1 1 0>, <&exti1 2 0>, <&exti1 3 0>, + <&exti1 4 0>, <&exti1 5 0>, <&exti1 6 0>, <&exti1 7 0>, + <&exti1 8 0>, <&exti1 9 0>, <&exti1 10 0>, <&exti1 11 0>, + <&exti1 12 0>, <&exti1 13 0>, <&exti1 14 0>, <&exti1 15 0>, + <&exti2 0 0>, <&exti2 1 0>, <&exti2 2 0>, <&exti2 3 0>, + <&exti2 4 0>, <&exti2 5 0>, <&exti2 6 0>, <&exti2 7 0>, + <&exti2 8 0>, <&exti2 9 0>, <&exti2 10 0>, <&exti2 11 0>, + <&exti2 12 0>, <&exti2 13 0>, <&exti2 14 0>, <&exti2 15 0>; gpioz: gpio@46200000 { gpio-controller; @@ -3068,7 +3087,7 @@ #size-cells = <1>; clocks = <&scmi_clk CK_SCMI_FMC>; resets = <&scmi_reset RST_SCMI_FMC>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; nand-controller@4,0 { @@ -3345,6 +3364,8 @@ interrupts = ; nvmem-cells = <&rsc_tbl_addr>, <&rsc_tbl_size>; nvmem-cell-names = "rsc-tbl-addr", "rsc-tbl-size"; + power-domains = <&cluster_pd>, <&ret_pd>; + power-domain-names = "default", "sleep"; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp253.dtsi b/arch/arm/dts/stm32mp253.dtsi index f1a9a854d7fe..3668c34fa454 100644 --- a/arch/arm/dts/stm32mp253.dtsi +++ b/arch/arm/dts/stm32mp253.dtsi @@ -14,7 +14,7 @@ enable-method = "psci"; clocks = <&scmi_perf 0>; clock-names = "cpu"; - power-domains = <&CPU_PD1>; + power-domains = <&cpu1_pd>; power-domain-names = "psci"; }; }; @@ -26,10 +26,10 @@ }; psci { - CPU_PD1: power-domain-cpu1 { + cpu1_pd: power-domain-cpu1 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + power-domains = <&cluster_pd>; }; }; @@ -111,7 +111,7 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -126,7 +126,7 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0xd50 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -141,7 +141,7 @@ clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x1aa0 0 0 32 0 0 2 2>; access-controllers = <&rifsc 56>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -173,7 +173,7 @@ snps,axi-config = <&stmmac_axi_config_2>; snps,tso; access-controllers = <&rifsc 61>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; wakeup-source; status = "disabled"; snps,mtl-rx-config = <&mtl_rx_setup_2>; diff --git a/arch/arm/dts/stm32mp255.dtsi b/arch/arm/dts/stm32mp255.dtsi index ce5c53b1561b..14602a4057da 100644 --- a/arch/arm/dts/stm32mp255.dtsi +++ b/arch/arm/dts/stm32mp255.dtsi @@ -130,7 +130,7 @@ resets = <&rcc DSI_R>; reset-names = "apb"; access-controllers = <&rifsc 81>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -142,7 +142,7 @@ clock-names = "pclk", "ref", "pixclk"; resets = <&rcc LVDS_R>; access-controllers = <&rifsc 84>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -153,7 +153,7 @@ interrupts = ; clocks = <&rcc CK_BUS_VDEC>; access-controllers = <&rifsc 89>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; }; venc: venc@480e0000 { @@ -163,7 +163,7 @@ interrupts = ; clocks = <&rcc CK_BUS_VENC>; access-controllers = <&rifsc 90>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; }; gpu: gpu@48280000 { @@ -173,7 +173,7 @@ resets = <&rcc GPU_R>; clock-names = "bus", "core"; clocks = <&rcc CK_BUS_GPU>, <&rcc CK_KER_GPU>; - power-domains = <&scmi_devpd PD_SCMI_GPU>, <&CLUSTER_PD>; + power-domains = <&scmi_devpd PD_SCMI_GPU>, <&d1_pd>; access-controllers = <&rifsc 79>; status = "disabled"; diff --git a/arch/arm/dts/stm32mp257.dtsi b/arch/arm/dts/stm32mp257.dtsi index b9823fd079cf..c364d47daac4 100644 --- a/arch/arm/dts/stm32mp257.dtsi +++ b/arch/arm/dts/stm32mp257.dtsi @@ -20,7 +20,7 @@ ranges = <0x4c000000 0x4c000000 0x2000000>, <0x4b000000 0x4b000000 0xc0000>; access-controllers = <&rifsc 70>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; deip_sw0: deip-sw@4c000000 { diff --git a/arch/arm/dts/stm32mp257f-dk-ca35tdcid-resmem.dtsi b/arch/arm/dts/stm32mp257f-dk-ca35tdcid-resmem.dtsi index 243df32b685d..2931ad2b4594 100644 --- a/arch/arm/dts/stm32mp257f-dk-ca35tdcid-resmem.dtsi +++ b/arch/arm/dts/stm32mp257f-dk-ca35tdcid-resmem.dtsi @@ -42,8 +42,18 @@ no-map; }; - cm33_sram1: cm33-sram1@a041000 { - reg = <0x0 0xa041000 0x0 0x1f000>; + scmi_cid2_s: scmi-cid2-s@a041000 { + reg = <0x0 0xa041000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_ns: scmi-cid2-ns@a042000 { + reg = <0x0 0xa042000 0x0 0x1000>; + no-map; + }; + + cm33_sram1: cm33-sram1@a043000 { + reg = <0x0 0xa043000 0x0 0x1d000>; no-map; }; diff --git a/arch/arm/dts/stm32mp257f-dk.dts b/arch/arm/dts/stm32mp257f-dk.dts index 76dbcfbc95a9..88bafebefe06 100644 --- a/arch/arm/dts/stm32mp257f-dk.dts +++ b/arch/arm/dts/stm32mp257f-dk.dts @@ -59,6 +59,7 @@ compatible = "dmic-codec"; #sound-dai-cells = <1>; sound-name-prefix = "dmic0"; + vref-supply = <&scmi_v3v3>; status = "okay"; port { @@ -72,6 +73,7 @@ compatible = "dmic-codec"; #sound-dai-cells = <1>; sound-name-prefix = "dmic1"; + vref-supply = <&scmi_v3v3>; status = "okay"; port { @@ -102,6 +104,7 @@ label = "wake-up"; linux,code = ; interrupts-extended = <&optee 0>; + wakeup-source; status = "okay"; }; }; @@ -131,30 +134,6 @@ }; }; - imx335_2v9: imx335-2v9 { - compatible = "regulator-fixed"; - regulator-name = "imx335-avdd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-always-on; - }; - - imx335_1v8: imx335-1v8 { - compatible = "regulator-fixed"; - regulator-name = "imx335-ovdd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - imx335_1v2: imx335-1v2 { - compatible = "regulator-fixed"; - regulator-name = "imx335-dvdd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x1 0x0>; @@ -164,6 +143,7 @@ compatible = "edt,etml0700z9ndha", "panel-lvds"; enable-gpios = <&gpioi 4 GPIO_ACTIVE_HIGH>; backlight = <&panel_lvds_backlight>; + power-supply = <&scmi_v3v3>; default-on; status = "okay"; @@ -191,10 +171,11 @@ }; panel_lvds_backlight: panel-lvds-backlight { - compatible = "gpio-backlight"; - gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; - default-on; - default-brightness-level = <1>; + compatible = "pwm-backlight"; + pwms = <&pwm3 1 1000000 0>; + brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>; + default-brightness-level = <10>; + power-supply = <&scmi_v3v3>; status = "okay"; }; @@ -244,62 +225,6 @@ status = "okay"; }; -&cs_cpu_debug0 { - status = "okay"; -}; - -&cs_cpu_debug1 { - status = "okay"; -}; - -&cs_cti0 { - status = "okay"; -}; - -&cs_cti1 { - status = "okay"; -}; - -&cs_cti_cpu0 { - status = "okay"; -}; - -&cs_cti_cpu1 { - status = "okay"; -}; - -&cs_etf { - status = "okay"; -}; - -&cs_etm0 { - status = "okay"; -}; - -&cs_etm1 { - status = "okay"; -}; - -&cs_etr { - status = "okay"; -}; - -&cs_funnel { - status = "okay"; -}; - -&cs_replicator { - status = "okay"; -}; - -&cs_stm { - status = "okay"; -}; - -&cs_tpiu { - status = "okay"; -}; - &csi { vdd-supply = <&scmi_vddcore>; vdda18-supply = <&scmi_v1v8>; @@ -311,7 +236,7 @@ reg = <0>; csi_sink: endpoint { remote-endpoint = <&imx335_ep>; - data-lanes = <0 1>; + data-lanes = <1 2>; bus-type = <4>; }; }; @@ -413,14 +338,14 @@ /delete-property/dmas; /delete-property/dma-names; - imx335: imx335@1a { + imx335: camera@1a { compatible = "sony,imx335"; reg = <0x1a>; clocks = <&clk_ext_camera>; - avdd-supply = <&imx335_2v9>; - ovdd-supply = <&imx335_1v8>; - dvdd-supply = <&imx335_1v2>; - reset-gpios = <&gpiob 1 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; + avdd-supply = <&scmi_v3v3>; + ovdd-supply = <&scmi_v3v3>; + dvdd-supply = <&scmi_v3v3>; + reset-gpios = <&gpiob 1 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; powerdown-gpios = <&gpiob 11 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; status = "okay"; @@ -527,6 +452,7 @@ /* use LPTIMER with tick broadcast for suspend mode */ &lptimer3 { + clocks = <&rcc CK_LPTIM3_AM>; status = "okay"; timer { status = "okay"; @@ -583,6 +509,15 @@ memory-region = <&cm0_cube_fw>, <&cm0_cube_data>; clocks = <&rcc CK_CPU3>, <&rcc CK_CPU3_AM>, + <&rcc CK_LPUART1_C3>, + <&rcc CK_KER_LPUART1>, + <&rcc CK_LPUART1_AM>, + <&rcc CK_GPIOZ_C3>, + <&scmi_clk CK_SCMI_GPIOZ>, + <&scmi_clk CK_SCMI_GPIOZ_AM>, + <&rcc CK_LPTIM4_C3>, + <&rcc CK_KER_LPTIM4>, + <&rcc CK_LPTIM4_AM>, <&scmi_clk CK_SCMI_IPCC2>, <&scmi_clk CK_SCMI_IPCC2_AM>; status = "okay"; @@ -618,16 +553,23 @@ }; filter0: filter@84 { + #address-cells = <1>; + #size-cells = <0>; st,cic-mode = <4>; st,sitf = <&sitf6 0>; st,hpf-filter-cutoff-bp = <625>; status = "okay"; + channel@0 { + reg = <0>; + label = "dmic_u53"; + }; + asoc_pdm0: mdf-dai { compatible = "st,stm32mp25-mdf-dai"; #sound-dai-cells = <0>; io-channels = <&filter0 0>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "okay"; mdf1_port0: port { @@ -639,16 +581,23 @@ }; filter1: filter@104 { + #address-cells = <1>; + #size-cells = <0>; st,cic-mode = <4>; st,sitf = <&sitf6 1>; st,hpf-filter-cutoff-bp = <625>; status = "okay"; + channel@1 { + reg = <1>; + label = "dmic_u12"; + }; + asoc_pdm1: mdf-dai { compatible = "st,stm32mp25-mdf-dai"; #sound-dai-cells = <0>; io-channels = <&filter1 0>; - power-domains = <&RET_PD>; + power-domains = <&d1_pd>; status = "okay"; mdf1_port1: port { @@ -707,35 +656,35 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; - scmi_vddcore: regulator@11 { + scmi_vddcore: regulator@b { reg = ; regulator-name = "vddcore"; }; - scmi_v1v8: regulator@14 { + scmi_v1v8: regulator@e { reg = ; regulator-name = "v1v8"; }; - scmi_v3v3: regulator@16 { + scmi_v3v3: regulator@10 { reg = ; regulator-name = "v3v3"; }; - scmi_vdd_emmc: regulator@18 { + scmi_vdd_emmc: regulator@12 { reg = ; regulator-name = "vdd_emmc"; }; - scmi_vdd3v3_usb: regulator@20 { + scmi_vdd3v3_usb: regulator@14 { reg = ; regulator-name = "vdd3v3_usb"; }; - scmi_v5v_hdmi: regulator@21 { + scmi_v5v_hdmi: regulator@15 { reg = ; regulator-name = "v5v_hdmi"; }; - scmi_v5v_vconn: regulator@22 { + scmi_v5v_vconn: regulator@16 { reg = ; regulator-name = "v5v_vconn"; }; - scmi_vdd_sdcard: regulator@23 { + scmi_vdd_sdcard: regulator@17 { reg = ; regulator-name = "vdd_sdcard"; }; @@ -773,6 +722,7 @@ vmmc-supply = <&scmi_vdd_emmc>; vqmmc-supply = <&scmi_vddio2>; mmc-ddr-1_8v; + mmc-hs200-1_8v; status = "okay"; }; @@ -806,6 +756,16 @@ status = "disabled"; }; +&timers3 { + status = "okay"; + pwm3: pwm { + pinctrl-0 = <&pwm3_ch2_pins_a>; + pinctrl-1 = <&pwm3_ch2_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; +}; + /* Bluetooth */ &usart1 { pinctrl-names = "default", "sleep", "idle"; @@ -818,7 +778,7 @@ bluetooth { shutdown-gpios = <&gpiog 4 GPIO_ACTIVE_HIGH>; compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; + max-speed = <2000000>; vbat-supply = <&scmi_v3v3>; vddio-supply = <&scmi_v3v3>; }; diff --git a/arch/arm/dts/stm32mp257f-ev1-ca35tdcid-resmem.dtsi b/arch/arm/dts/stm32mp257f-ev1-ca35tdcid-resmem.dtsi index 58266b81c7cf..9990523113e0 100644 --- a/arch/arm/dts/stm32mp257f-ev1-ca35tdcid-resmem.dtsi +++ b/arch/arm/dts/stm32mp257f-ev1-ca35tdcid-resmem.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2022 - All Rights Reserved * Author: Loic Pallardy loic.pallardy@foss.st.com for STMicroelectronics. @@ -42,8 +42,18 @@ no-map; }; - cm33_sram1: cm33-sram1@a041000 { - reg = <0x0 0xa041000 0x0 0x1f000>; + scmi_cid2_s: scmi-cid2-s@a041000 { + reg = <0x0 0xa041000 0x0 0x1000>; + no-map; + }; + + scmi_cid2_ns: scmi-cid2-ns@a042000 { + reg = <0x0 0xa042000 0x0 0x1000>; + no-map; + }; + + cm33_sram1: cm33-sram1@a043000 { + reg = <0x0 0xa043000 0x0 0x1d000>; no-map; }; diff --git a/arch/arm/dts/stm32mp257f-ev1.dts b/arch/arm/dts/stm32mp257f-ev1.dts index e199c6aa8d1d..8a240acbe00b 100644 --- a/arch/arm/dts/stm32mp257f-ev1.dts +++ b/arch/arm/dts/stm32mp257f-ev1.dts @@ -92,7 +92,6 @@ compatible = "gpio-leds"; led-blue { - label = "heartbeat"; function = LED_FUNCTION_HEARTBEAT; color = ; gpios = <&gpioj 7 GPIO_ACTIVE_HIGH>; @@ -113,30 +112,6 @@ }; }; - imx335_2v9: imx335-2v9 { - compatible = "regulator-fixed"; - regulator-name = "imx335-avdd"; - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - regulator-always-on; - }; - - imx335_1v8: imx335-1v8 { - compatible = "regulator-fixed"; - regulator-name = "imx335-ovdd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - imx335_1v2: imx335-1v2 { - compatible = "regulator-fixed"; - regulator-name = "imx335-dvdd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x1 0x0>; @@ -146,6 +121,8 @@ compatible = "edt,etml0700z9ndha", "panel-lvds"; enable-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>; backlight = <&panel_lvds_backlight>; + power-supply = <&scmi_v3v3>; + default-on; status = "okay"; width-mm = <156>; @@ -244,62 +221,6 @@ status = "okay"; }; -&cs_cpu_debug0 { - status = "okay"; -}; - -&cs_cpu_debug1 { - status = "okay"; -}; - -&cs_cti0 { - status = "okay"; -}; - -&cs_cti1 { - status = "okay"; -}; - -&cs_cti_cpu0 { - status = "okay"; -}; - -&cs_cti_cpu1 { - status = "okay"; -}; - -&cs_etf { - status = "okay"; -}; - -&cs_etm0 { - status = "okay"; -}; - -&cs_etm1 { - status = "okay"; -}; - -&cs_etr { - status = "okay"; -}; - -&cs_funnel { - status = "okay"; -}; - -&cs_replicator { - status = "okay"; -}; - -&cs_stm { - status = "okay"; -}; - -&cs_tpiu { - status = "okay"; -}; - &csi { vdd-supply = <&scmi_vddcore>; vdda18-supply = <&scmi_v1v8>; @@ -311,7 +232,7 @@ reg = <0>; csi_sink: endpoint { remote-endpoint = <&imx335_ep>; - data-lanes = <0 1>; + data-lanes = <1 2>; bus-type = <4>; }; }; @@ -439,14 +360,14 @@ /delete-property/dmas; /delete-property/dma-names; - imx335: imx335@1a { + imx335: camera@1a { compatible = "sony,imx335"; reg = <0x1a>; clocks = <&clk_ext_camera>; - avdd-supply = <&imx335_2v9>; - ovdd-supply = <&imx335_1v8>; - dvdd-supply = <&imx335_1v2>; - reset-gpios = <&gpioi 7 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; + avdd-supply = <&scmi_v3v3>; + ovdd-supply = <&scmi_v3v3>; + dvdd-supply = <&scmi_v3v3>; + reset-gpios = <&gpioi 7 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; powerdown-gpios = <&gpioi 0 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>; status = "okay"; @@ -557,6 +478,7 @@ /* use LPTIMER with tick broadcast for suspend mode */ &lptimer3 { + clocks = <&rcc CK_LPTIM3_AM>; status = "okay"; timer { status = "okay"; @@ -628,6 +550,12 @@ <&rcc CK_LPUART1_C3>, <&rcc CK_KER_LPUART1>, <&rcc CK_LPUART1_AM>, + <&rcc CK_GPIOZ_C3>, + <&scmi_clk CK_SCMI_GPIOZ>, + <&scmi_clk CK_SCMI_GPIOZ_AM>, + <&rcc CK_LPTIM4_C3>, + <&rcc CK_KER_LPTIM4>, + <&rcc CK_LPTIM4_AM>, <&scmi_clk CK_SCMI_IPCC2>, <&scmi_clk CK_SCMI_IPCC2_AM>; status = "okay"; @@ -750,27 +678,27 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; - scmi_vddcore: regulator@11 { + scmi_vddcore: regulator@b { reg = ; regulator-name = "vddcore"; }; - scmi_v1v8: regulator@14 { + scmi_v1v8: regulator@e { reg = ; regulator-name = "v1v8"; }; - scmi_v3v3: regulator@16 { + scmi_v3v3: regulator@10 { reg = ; regulator-name = "v3v3"; }; - scmi_vdd_emmc: regulator@18 { + scmi_vdd_emmc: regulator@12 { reg = ; regulator-name = "vdd_emmc"; }; - scmi_vdd3v3_usb: regulator@20 { + scmi_vdd3v3_usb: regulator@14 { reg = ; regulator-name = "vdd3v3_usb"; }; - scmi_vdd_sdcard: regulator@23 { + scmi_vdd_sdcard: regulator@17 { reg = ; regulator-name = "vdd_sdcard"; }; diff --git a/arch/arm/dts/stm32mp25xc.dtsi b/arch/arm/dts/stm32mp25xc.dtsi index 2f6bbb9d4dc1..302335f80958 100644 --- a/arch/arm/dts/stm32mp25xc.dtsi +++ b/arch/arm/dts/stm32mp25xc.dtsi @@ -15,7 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 96>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -25,11 +25,11 @@ interrupts = ; clocks = <&rcc CK_BUS_CRYP2>; resets = <&rcc CRYP2_R>; - dmas = <&hpdma 140 0x40 0x3021 0x0>, - <&hpdma 141 0x43 0x3012 0x0>; + dmas = <&hpdma 140 0x40 0x3021>, + <&hpdma 141 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 97>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp25xf.dtsi b/arch/arm/dts/stm32mp25xf.dtsi index 2f6bbb9d4dc1..302335f80958 100644 --- a/arch/arm/dts/stm32mp25xf.dtsi +++ b/arch/arm/dts/stm32mp25xf.dtsi @@ -15,7 +15,7 @@ <&hpdma 5 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 96>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; @@ -25,11 +25,11 @@ interrupts = ; clocks = <&rcc CK_BUS_CRYP2>; resets = <&rcc CRYP2_R>; - dmas = <&hpdma 140 0x40 0x3021 0x0>, - <&hpdma 141 0x43 0x3012 0x0>; + dmas = <&hpdma 140 0x40 0x3021>, + <&hpdma 141 0x43 0x3012>; dma-names = "in", "out"; access-controllers = <&rifsc 97>; - power-domains = <&CLUSTER_PD>; + power-domains = <&d1_pd>; status = "disabled"; }; }; diff --git a/arch/arm/dts/stm32mp25xxaj-pinctrl.dtsi b/arch/arm/dts/stm32mp25xxaj-pinctrl.dtsi index 036b0946ccc9..6834943c1849 100644 --- a/arch/arm/dts/stm32mp25xxaj-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp25xxaj-pinctrl.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2024 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. diff --git a/include/dt-bindings/clock/st,stm32mp21-rcc.h b/include/dt-bindings/clock/st,stm32mp21-rcc.h index 8bd845e982ef..be330ec345f6 100644 --- a/include/dt-bindings/clock/st,stm32mp21-rcc.h +++ b/include/dt-bindings/clock/st,stm32mp21-rcc.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ /* * Copyright (C) STMicroelectronics 2024 - All Rights Reserved * Author(s): Gabriel Fernandez @@ -318,7 +318,6 @@ #define CK_SCMI_ICN_DISPLAY 3 #define CK_SCMI_ICN_HSL 4 #define CK_SCMI_ICN_NIC 5 -#define CK_SCMI_ICN_VID 6 #define CK_SCMI_FLEXGEN_07 7 #define CK_SCMI_FLEXGEN_08 8 #define CK_SCMI_FLEXGEN_09 9 diff --git a/include/dt-bindings/regulator/st,stm32mp21-regulator.h b/include/dt-bindings/regulator/st,stm32mp21-regulator.h index bfad74986261..aac6426363d8 100644 --- a/include/dt-bindings/regulator/st,stm32mp21-regulator.h +++ b/include/dt-bindings/regulator/st,stm32mp21-regulator.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ /* * Copyright (C) 2024, STMicroelectronics - All Rights Reserved */ diff --git a/include/dt-bindings/regulator/st,stm32mp25-regulator.h b/include/dt-bindings/regulator/st,stm32mp25-regulator.h index 41afab475be0..10a893892055 100644 --- a/include/dt-bindings/regulator/st,stm32mp25-regulator.h +++ b/include/dt-bindings/regulator/st,stm32mp25-regulator.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* * Copyright (C) 2023, STMicroelectronics - All Rights Reserved */ From ef3fe8a3e65c365ad9b540d9f2414dd184bd2df4 Mon Sep 17 00:00:00 2001 From: Gatien Chevallier Date: Mon, 19 May 2025 17:12:00 +0200 Subject: [PATCH 2/7] board: stm32pm2: support st,eth-clk-sel property When this property is set, internal RCC clock is used for the RGMII 125MHz clock selection. Signed-off-by: Gatien Chevallier Change-Id: Ibb48a3403696f17c1331ab4c119e78aa07b1ceb1 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/460024 Reviewed-by: Christophe ROULLIER ACI: CIBUILD Reviewed-by: Gatien CHEVALLIER ACI: CITOOLS Tested-by: Gatien CHEVALLIER Reviewed-by: Patrice CHOTARD Tested-by: Christophe ROULLIER Domain-Review: Christophe ROULLIER --- board/st/stm32mp2/stm32mp2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c index 713cd261b8ee..8ea962ef10a9 100644 --- a/board/st/stm32mp2/stm32mp2.c +++ b/board/st/stm32mp2/stm32mp2.c @@ -480,7 +480,8 @@ int board_interface_eth_init(struct udevice *dev, bool ext_phyclk; /* Ethernet PHY have no cristal or need to be clock by RCC */ - ext_phyclk = dev_read_bool(dev, "st,ext-phyclk"); + ext_phyclk = dev_read_bool(dev, "st,ext-phyclk") || dev_read_bool(dev, "st,eth-clk-sel") || + dev_read_bool(dev, "st,eth-ref-clk-sel"); regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon"); From 8568c9fcc5f14cfcb9f0d916d0e20e1cc21c8626 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 28 May 2025 09:43:54 +0200 Subject: [PATCH 3/7] configs: stm32mp23: align with STM32MP25 config Some configs were missing in the stm32mp23_defconfig, preventing the platform to boot on M33TDCID flavor, mainly due to the missing mailbox configs. Change-Id: Ia82e839078bb1a04643085fc30f9bd5a738c7df2 Signed-off-by: Yann Gautier Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/462648 ACI: CIBUILD ACI: CITOOLS Domain-Review: Patrice CHOTARD Reviewed-by: Patrice CHOTARD --- configs/stm32mp23_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/configs/stm32mp23_defconfig b/configs/stm32mp23_defconfig index bf6d13090299..046b295adead 100644 --- a/configs/stm32mp23_defconfig +++ b/configs/stm32mp23_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp235f-dk" CONFIG_STM32MP23X=y CONFIG_CMD_STM32KEY=y +CONFIG_MFD_STM32_TIMERS=y CONFIG_ENV_OFFSET_REDUND=0x940000 CONFIG_TARGET_ST_STM32MP23X=y CONFIG_CMD_STM32PROG=y @@ -42,6 +43,7 @@ CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y +CONFIG_CMD_PWM=y CONFIG_CMD_I2C=y CONFIG_CMD_LSBLK=y CONFIG_CMD_MMC=y @@ -97,6 +99,8 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_DM_MAILBOX=y +CONFIG_STM32_IPCC=y CONFIG_STM32_FMC2_EBI=y CONFIG_STM32_OMI=y CONFIG_STM32_OMM=y @@ -134,6 +138,8 @@ CONFIG_PHY_STM32_USB2PHY=y CONFIG_PINCONF=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_PWM=y +CONFIG_PWM_STM32=y CONFIG_RAM=y # CONFIG_STM32MP1_DDR is not set CONFIG_REMOTEPROC_OPTEE=y From e30324eb8a06a80a4b308ea5822533f45e37f841 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 28 May 2025 09:51:50 +0200 Subject: [PATCH 4/7] arm: mach-stm32mp: stm32mp23: add internal RAMs mapping Add the BOOT alias1 section for internal memories for STM32MP23. Change-Id: I75f4545b5ea56fa3a8b7ca39fa0c4f98b97ba28c Signed-off-by: Yann Gautier Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/462649 Reviewed-by: Patrice CHOTARD ACI: CIBUILD Domain-Review: Patrice CHOTARD --- arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c b/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c index 42a24a46f5e4..2196aa4a4ed4 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c +++ b/arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c @@ -26,6 +26,16 @@ struct mm_region stm32mp2_mem_map[MP2_MEM_MAP_MAX] = { PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { #endif +#if defined(CONFIG_STM32MP23X) + /* VDERAM, RETRAM, SRAMs, SYSRAM: BOOT alias1 */ + .virt = 0x0A000000UL, + .phys = 0x0A000000UL, + .size = 0x00200000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { +#endif #if defined(CONFIG_STM32MP25X) /* VDERAM, RETRAM, SRAMs, SYSRAM: BOOT alias1 */ .virt = 0x0A000000UL, From b8efe7e1b12193529a444d1c38fb43e0a4714508 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Wed, 28 May 2025 17:51:20 +0200 Subject: [PATCH 5/7] arm: stm32mp: add Rev.Y and Rev.X support for STM32MP23 Add the display of STM32MP23 SoC revision Y or X. Change-Id: I0c6985bac72a13a9024c4de9bcb11ec4bf391c5f Signed-off-by: Yann Gautier Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/u-boot/+/462914 ACI: CITOOLS Reviewed-by: Patrice CHOTARD Domain-Review: Patrice CHOTARD ACI: CIBUILD --- arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c b/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c index 4459ba686b78..9ce5b8d3a419 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c +++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp23x.c @@ -162,6 +162,12 @@ void get_soc_name(char name[SOC_NAME_SIZE]) case OTP_REVID_2: cpu_r = "B"; break; + case OTP_REVID_2_1: + cpu_r = "Y"; + break; + case OTP_REVID_2_2: + cpu_r = "X"; + break; default: break; } From 64beae9fed51f49b53f952d00d9918b9eb3b040b Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 3 Mar 2025 17:40:42 +0100 Subject: [PATCH 6/7] Prepare v2023.10-stm32mp-r2-rc8 Update version in Makefile to prepare the label v2023.10-stm32mp-r2 for OpenSTLinux V6.1.0 Signed-off-by: Patrice Chotard Change-Id: I475ea11aee2b76580a415bd703f09af0d52767e3 --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1fd0c225a233..0af4312ad05f 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2023 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -stm32mp-r1.2 +EXTRAVERSION = -stm32mp-r2-rc8 NAME = # *DOCUMENTATION* From 40da460641fc441b30b2da5f54dc6c627bfc5bd1 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 9 Dec 2025 14:39:20 +0100 Subject: [PATCH 7/7] board: stm32mp2: fix fwu_mdata node updating Comparing the SD card boot with the eMMC one, the DTS differs as follows: - fwu-mdata-store = <0x00000085>; + fwu-mdata-store = "/soc@0/bus@42080000/mmc@48230000"; In both cases, the U-Boot DTS loaded by tf-a-stm32mp at address 0x84400000 was obtained with the following commands: STM32MP> fdt addr 0x84400000 Working FDT set to 84400000 STM32MP> fdt print As shown in the diff, the working case (SD card) uses a numeric value, i.e. the phandle of the sdmmc1 node, while the eMMC case uses a path. This patch updates the fwu-mdata-store property to use the phandle instead of the path. Signed-off-by: Dario Binacchi --- board/st/stm32mp2/stm32mp2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c index 8ea962ef10a9..d312e5cb1071 100644 --- a/board/st/stm32mp2/stm32mp2.c +++ b/board/st/stm32mp2/stm32mp2.c @@ -818,6 +818,7 @@ int fdt_update_fwu_properties(void *blob, int nodeoff, { int ret; int storage_off; + const fdt32_t *phandle; ret = fdt_increase_size(blob, 100); if (ret) { @@ -837,8 +838,14 @@ int fdt_update_fwu_properties(void *blob, int nodeoff, return nodeoff; } - ret = fdt_setprop_string(blob, nodeoff, "fwu-mdata-store", storage_path); + phandle = fdt_getprop(blob, storage_off, "phandle", NULL); + if (!phandle) { + log_err("Can't find phandle for %s\n", storage_path); + return -ENOENT; + } + ret = fdt_setprop_u32(blob, nodeoff, "fwu-mdata-store", + fdt32_to_cpu(*phandle)); if (ret < 0) log_err("Can't set fwu-mdata-store property\n");