From bd068399357f6bafee6b3fe185d818a6e0c401fe Mon Sep 17 00:00:00 2001 From: 94xhn <87560781+94xhn@users.noreply.github.com> Date: Sat, 11 Jul 2026 21:36:19 +0800 Subject: [PATCH] fix(linker): correct cross-toolchain memory map inconsistencies Found by cross-checking each example's GCC (STM32CubeIDE)/IAR (EWARM)/ Keil (MDK-ARM) linker scripts against each other and against known-good Templates sibling projects, following the same audit already done for STM32CubeG0/G4/H5/H7/L0/L4/L5/U5/WB/WBA/WL/F0/F1/F4/F7 in this repo family. 1. Applications/OpenBootloader (NUCLEO-C031C6, STM32C031C6, 32K flash total): GCC's .ld declared a 27K bootloader region; IAR's .icf (ROM_end 0x08003BFF) and Keil's top-level / tags both agree on 15K (0x3C00). Keil's OCR_RVCT4 entry had drifted to 0x8000 (32K, exactly the whole chip - a giveaway that it was never customized from the device-pack default), disagreeing with its own top-level IROM tag in the same file. Fixed GCC's .ld to 15K and Keil's OCR_RVCT4 Size to 0x3c00 to match IAR and Keil's own top-level tag. 2. Applications/FileX/Fx_SRAM_File_Edit_Standalone and Applications/ThreadX/Tx_LowPower and Tx_Thread_Creation (NUCLEO-C092RC, STM32C092RC, 256K flash / 30K RAM): all three projects' GCC .ld and Keil .uvprojx (both the summary line and the IRAM/IROM/OCR_RVCT4 fields) declared only 128K flash / 24K RAM - half of the chip's actual capacity on the flash side and less than the actual RAM. This board's own Templates project confirms the real 256K/30K split. Fixed GCC's .ld MEMORY block and Keil's line + IRAM/IROM/OCR_RVCT4/OCR_RVCT9 entries on all three projects to match. No local ARM toolchain (arm-none-eabi-gcc/IAR/Keil) available to compile/link-test these changes; verification relied on address-arithmetic cross-referencing against multiple independent references per finding (Templates gold standards, IAR's region boundaries, and Keil's own top-level IROM/Cpu tags vs its OCR_RVCT entries within the same file). Signed-off-by: 94xhn <87560781+94xhn@users.noreply.github.com> --- .../OpenBootloader/MDK-ARM/OpenBootloader.uvprojx | 2 +- .../OpenBootloader/STM32CubeIDE/STM32C031C6TX_FLASH.ld | 2 +- .../MDK-ARM/Fx_SRAM_File_Edit_Standalone.uvprojx | 10 +++++----- .../STM32CubeIDE/STM32C092RCTX_FLASH.ld | 8 ++++---- .../ThreadX/Tx_LowPower/MDK-ARM/Tx_LowPower.uvprojx | 10 +++++----- .../Tx_LowPower/STM32CubeIDE/STM32C092RCTX_FLASH.ld | 8 ++++---- .../MDK-ARM/Tx_Thread_Creation.uvprojx | 10 +++++----- .../STM32CubeIDE/STM32C092RCTX_FLASH.ld | 8 ++++---- 8 files changed, 29 insertions(+), 29 deletions(-) diff --git a/Projects/NUCLEO-C031C6/Applications/OpenBootloader/MDK-ARM/OpenBootloader.uvprojx b/Projects/NUCLEO-C031C6/Applications/OpenBootloader/MDK-ARM/OpenBootloader.uvprojx index 3d61c551..2e917482 100644 --- a/Projects/NUCLEO-C031C6/Applications/OpenBootloader/MDK-ARM/OpenBootloader.uvprojx +++ b/Projects/NUCLEO-C031C6/Applications/OpenBootloader/MDK-ARM/OpenBootloader.uvprojx @@ -276,7 +276,7 @@ 1 0x8000000 - 0x8000 + 0x3c00 1 diff --git a/Projects/NUCLEO-C031C6/Applications/OpenBootloader/STM32CubeIDE/STM32C031C6TX_FLASH.ld b/Projects/NUCLEO-C031C6/Applications/OpenBootloader/STM32CubeIDE/STM32C031C6TX_FLASH.ld index 6252b9ac..1e1c561d 100644 --- a/Projects/NUCLEO-C031C6/Applications/OpenBootloader/STM32CubeIDE/STM32C031C6TX_FLASH.ld +++ b/Projects/NUCLEO-C031C6/Applications/OpenBootloader/STM32CubeIDE/STM32C031C6TX_FLASH.ld @@ -46,7 +46,7 @@ MEMORY { RAM1 (xrw) : ORIGIN = 0x20000000, LENGTH = 5K RAM2 (xrw) : ORIGIN = 0x20001400, LENGTH = 1K - ROM (rx) : ORIGIN = 0x08000000, LENGTH = 27K + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 15K } /* Sections */ diff --git a/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/MDK-ARM/Fx_SRAM_File_Edit_Standalone.uvprojx b/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/MDK-ARM/Fx_SRAM_File_Edit_Standalone.uvprojx index 5c91f202..b9d44e17 100644 --- a/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/MDK-ARM/Fx_SRAM_File_Edit_Standalone.uvprojx +++ b/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/MDK-ARM/Fx_SRAM_File_Edit_Standalone.uvprojx @@ -18,7 +18,7 @@ STMicroelectronics Keil.STM32C0xx_DFP.1.2.0-RC2 https://www.keil.com/pack/ - IRAM(0x20000000-0x20005FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ + IRAM(0x20000000-0x200077FF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ @@ -247,12 +247,12 @@ 0 0x20000000 - 0x6000 + 0x7800 1 0x8000000 - 0x20000 + 0x40000 0 @@ -277,7 +277,7 @@ 1 0x8000000 - 0x20000 + 0x40000 1 @@ -302,7 +302,7 @@ 0 0x20000000 - 0x6000 + 0x7800 0 diff --git a/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/STM32CubeIDE/STM32C092RCTX_FLASH.ld b/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/STM32CubeIDE/STM32C092RCTX_FLASH.ld index 203d0970..3e7ad16b 100644 --- a/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/STM32CubeIDE/STM32C092RCTX_FLASH.ld +++ b/Projects/NUCLEO-C092RC/Applications/FileX/Fx_SRAM_File_Edit_Standalone/STM32CubeIDE/STM32C092RCTX_FLASH.ld @@ -6,8 +6,8 @@ ** @author : Auto-generated by STM32CubeIDE ** ** @brief : Linker script for STM32C092RCTx Device from STM32C0 series -** 128KBytes FLASH -** 24KBytes RAM +** 256KBytes FLASH +** 30KBytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -44,8 +44,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 24K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 30K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K } /* Sections */ diff --git a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/MDK-ARM/Tx_LowPower.uvprojx b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/MDK-ARM/Tx_LowPower.uvprojx index 9b9ed203..03fdf77f 100644 --- a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/MDK-ARM/Tx_LowPower.uvprojx +++ b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/MDK-ARM/Tx_LowPower.uvprojx @@ -18,7 +18,7 @@ STMicroelectronics Keil.STM32C0xx_DFP.1.2.0-RC2 https://www.keil.com/pack/ - IRAM(0x20000000-0x20005FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ + IRAM(0x20000000-0x200077FF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ @@ -247,12 +247,12 @@ 0 0x20000000 - 0x6000 + 0x7800 1 0x8000000 - 0x20000 + 0x40000 0 @@ -277,7 +277,7 @@ 1 0x8000000 - 0x20000 + 0x40000 1 @@ -302,7 +302,7 @@ 0 0x20000000 - 0x6000 + 0x7800 0 diff --git a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/STM32CubeIDE/STM32C092RCTX_FLASH.ld b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/STM32CubeIDE/STM32C092RCTX_FLASH.ld index 203d0970..3e7ad16b 100644 --- a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/STM32CubeIDE/STM32C092RCTX_FLASH.ld +++ b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_LowPower/STM32CubeIDE/STM32C092RCTX_FLASH.ld @@ -6,8 +6,8 @@ ** @author : Auto-generated by STM32CubeIDE ** ** @brief : Linker script for STM32C092RCTx Device from STM32C0 series -** 128KBytes FLASH -** 24KBytes RAM +** 256KBytes FLASH +** 30KBytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -44,8 +44,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 24K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 30K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K } /* Sections */ diff --git a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/MDK-ARM/Tx_Thread_Creation.uvprojx b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/MDK-ARM/Tx_Thread_Creation.uvprojx index 31195de3..e4935d7a 100644 --- a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/MDK-ARM/Tx_Thread_Creation.uvprojx +++ b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/MDK-ARM/Tx_Thread_Creation.uvprojx @@ -18,7 +18,7 @@ STMicroelectronics Keil.STM32C0xx_DFP.1.2.0-RC2 https://www.keil.com/pack/ - IRAM(0x20000000-0x20005FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ + IRAM(0x20000000-0x200077FF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") TZ @@ -247,12 +247,12 @@ 0 0x20000000 - 0x6000 + 0x7800 1 0x8000000 - 0x20000 + 0x40000 0 @@ -277,7 +277,7 @@ 1 0x8000000 - 0x20000 + 0x40000 1 @@ -302,7 +302,7 @@ 0 0x20000000 - 0x6000 + 0x7800 0 diff --git a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/STM32CubeIDE/STM32C092RCTX_FLASH.ld b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/STM32CubeIDE/STM32C092RCTX_FLASH.ld index 203d0970..3e7ad16b 100644 --- a/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/STM32CubeIDE/STM32C092RCTX_FLASH.ld +++ b/Projects/NUCLEO-C092RC/Applications/ThreadX/Tx_Thread_Creation/STM32CubeIDE/STM32C092RCTX_FLASH.ld @@ -6,8 +6,8 @@ ** @author : Auto-generated by STM32CubeIDE ** ** @brief : Linker script for STM32C092RCTx Device from STM32C0 series -** 128KBytes FLASH -** 24KBytes RAM +** 256KBytes FLASH +** 30KBytes RAM ** ** Set heap size, stack size and stack location according ** to application requirements. @@ -44,8 +44,8 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ /* Memories definition */ MEMORY { - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 24K - FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 30K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K } /* Sections */