Enabling P2P reduces bandwidth on Arrow Lake / Z890? #1215
Replies: 2 comments
-
|
@petertiedemann Short answer: yes, that's expected on this kind of platform and it's not a bug. With P2P off, cudaMemcpyPeer stages the copy through host RAM (GPU→RAM→GPU), which is a well-optimized, posted-write DMA path. With P2P on, the copy goes GPU→GPU directly, but on a consumer Z890 board that traffic has to route up through the CPU root complex (and across the DMI link to the chipset for the PCH-attached cards). Client root complexes are poor P2P forwarders NVIDIA's own GPUDirect docs note peer-to-peer read bandwidth is "severely limited" through the CPU. Add your reduced link widths (x4/x8) and the shared DMI uplink, and direct P2P ends up slower than host staging for bulk transfers. The latency improvement you saw is the real P2P benefit on this hardware; bandwidth isn't. So: for throughput, you're better off leaving P2P disabled here. Good P2P bandwidth needs full x16 CPU-direct lanes (Threadripper Pro / EPYC) or a board with a PCIe switch. |
Beta Was this translation helpful? Give feedback.
-
|
I am experiencing the same issue with a dual RTX 5060 Ti 16GB setup on an MSI PRO Z890P motherboard paired with an Intel Core Ultra 265K (Arrow Lake) processor. Below are the results from the connectivity and bandwidth matrix: Given these metrics, I have two questions:
|
Beta Was this translation helpful? Give feedback.
Uh oh!
There was an error while loading. Please reload this page.
-
On my systems equipped with 4x 5060TI 16gb GPUs, i noticed that
p2pBandwidthLatencyTestindicates that P2P bandwidth is lower than non-P2P. Is that expected, and if so, is it specific to the specific CPU, or determined by chipset etc?In case it matters, performance is identical with iommu off completely as well as with intel_iommu=on iommu=pt.
Here is an example:
Beta Was this translation helpful? Give feedback.
All reactions