After llvm/llvm-project@b115dd1:
arch/arm64/lib/delay.c:52:3: error: expected writable system register or pstate
52 | wfit(end);
| ^
arch/arm64/include/asm/barrier.h:24:32: note: expanded from macro 'wfit'
24 | #define wfit(val) asm volatile("msr s0_3_c1_c0_1, %0" \
| ^
<inline asm>:1:6: note: instantiated into assembly here
1 | msr s0_3_c1_c0_1, x26
| ^
arch/arm64/lib/delay.c:54:4: error: expected writable system register or pstate
54 | wfet(end);
| ^
arch/arm64/include/asm/barrier.h:21:32: note: expanded from macro 'wfet'
21 | #define wfet(val) asm volatile("msr s0_3_c1_c0_0, %0" \
| ^
<inline asm>:1:6: note: instantiated into assembly here
1 | msr s0_3_c1_c0_0, x26
| ^
2 errors generated.
I have asked the author if this is intentional (which it seems like it is). If so, we will probably need something like
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index fe60738e5943..0e21f8030adc 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2135,6 +2135,10 @@ config ARM64_EPAN
if the cpu does not implement the feature.
endmenu # "ARMv8.7 architectural features"
+config AS_HAS_WFXT
+ # supported by binutils 2.36+ and LLVM 13+ (17+ for working .arch)
+ def_bool $(as-instr,.arch armv8.7-a\nwfit x1)
+
config AS_HAS_MOPS
def_bool $(as-instr,.arch_extension mops)
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 9495c4441a46..37725391179d 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -16,13 +16,19 @@
#define __nops(n) ".rept " #n "\nnop\n.endr\n"
#define nops(n) asm volatile(__nops(n))
+#ifdef CONFIG_AS_HAS_WFXT
+#define __wfet_asm ".arch armv8.7-a\nwfet"
+#define __wfit_asm ".arch armv8.7-a\nwfit"
+#else
+#define __wfet_asm "msr s0_3_c1_c0_0,"
+#define __wfit_asm "msr s0_3_c1_c0_1,"
+#endif
+
#define sev() asm volatile("sev" : : : "memory")
#define wfe() asm volatile("wfe" : : : "memory")
-#define wfet(val) asm volatile("msr s0_3_c1_c0_0, %0" \
- : : "r" (val) : "memory")
+#define wfet(val) asm volatile(__wfet_asm " %0" : : "r" (val) : "memory")
#define wfi() asm volatile("wfi" : : : "memory")
-#define wfit(val) asm volatile("msr s0_3_c1_c0_1, %0" \
- : : "r" (val) : "memory")
+#define wfit(val) asm volatile(__wfit_asm " %0" : : "r" (val) : "memory")
#define isb() asm volatile("isb" : : : "memory")
#define dmb(opt) asm volatile("dmb " #opt : : : "memory")
After llvm/llvm-project@b115dd1:
I have asked the author if this is intentional (which it seems like it is). If so, we will probably need something like