From 101ec0c8688e76ad928d319c1cb9ff9d79b50928 Mon Sep 17 00:00:00 2001 From: Yureka Date: Thu, 4 Jun 2026 14:13:51 +0200 Subject: [PATCH] arm64: dts: apple: t603[124]: Add "capacity-dmips-mhz" properties Values determined using coremark. Signed-off-by: Yureka --- arch/arm64/boot/dts/apple/t6031-base.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6031-base.dtsi b/arch/arm64/boot/dts/apple/t6031-base.dtsi index 87b579410762db..55891125010eee 100644 --- a/arch/arm64/boot/dts/apple/t6031-base.dtsi +++ b/arch/arm64/boot/dts/apple/t6031-base.dtsi @@ -84,6 +84,7 @@ i-cache-size = <0x20000>; d-cache-size = <0x10000>; operating-points-v2 = <&sawtooth_opp>; + capacity-dmips-mhz = <870>; performance-domains = <&cpufreq_e>; }; @@ -97,6 +98,7 @@ i-cache-size = <0x20000>; d-cache-size = <0x10000>; operating-points-v2 = <&sawtooth_opp>; + capacity-dmips-mhz = <870>; performance-domains = <&cpufreq_e>; }; @@ -110,6 +112,7 @@ i-cache-size = <0x20000>; d-cache-size = <0x10000>; operating-points-v2 = <&sawtooth_opp>; + capacity-dmips-mhz = <870>; performance-domains = <&cpufreq_e>; }; @@ -123,6 +126,7 @@ i-cache-size = <0x20000>; d-cache-size = <0x10000>; operating-points-v2 = <&sawtooth_opp>; + capacity-dmips-mhz = <870>; performance-domains = <&cpufreq_e>; }; @@ -136,6 +140,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -149,6 +154,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -162,6 +168,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -175,6 +182,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -188,6 +196,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -201,6 +210,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p0>; }; @@ -214,6 +224,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; }; @@ -227,6 +238,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; }; @@ -240,6 +252,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; }; @@ -253,6 +266,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; }; @@ -266,6 +280,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; }; @@ -279,6 +294,7 @@ i-cache-size = <0x30000>; d-cache-size = <0x20000>; operating-points-v2 = <&everest_opp>; + capacity-dmips-mhz = <1024>; performance-domains = <&cpufreq_p1>; };