@@ -140,6 +140,7 @@ struct DedxPidAnalysis {
140140 ZVtxCut,
141141 NoSameBunchPileup,
142142 GoodZvtxFT0vsPV,
143+ GoodITS,
143144 INELgt
144145 };
145146
@@ -204,7 +205,7 @@ struct DedxPidAnalysis {
204205 " max z distance to IP" };
205206 Configurable<float > etaMin{" etaMin" , -0 .8f , " etaMin" };
206207 Configurable<float > etaMax{" etaMax" , +0 .8f , " etaMax" };
207- Configurable<float > minNCrossedRowsOverFindableClustersTPC{" minNCrossedRowsOverFindableClustersTPC" , 0 .8f , " Additional cut on the minimum value of the ratio between crossed rows and findable clusters in the TPC" };
208+ // Configurable<float> minNCrossedRowsOverFindableClustersTPC{"minNCrossedRowsOverFindableClustersTPC", 0.8f, "Additional cut on the minimum value of the ratio between crossed rows and findable clusters in the TPC"};
208209 Configurable<float > nSigmaDCAxy{" nSigmaDCAxy" , 3.0 , " nSigma DCAxy selection" };
209210 Configurable<float > dcaXYp0{" dcaXYp0" , 0 .0105f , " DCAxy formula: p0 + p1/pt^p2" };
210211 Configurable<float > dcaXYp1{" dcaXYp1" , 0 .0350f , " DCAxy p1 parameter" };
@@ -250,6 +251,7 @@ struct DedxPidAnalysis {
250251 Configurable<bool > nGoodZvtx{" nGoodZvtx" , true , " Rejects events with no vertex match between FT0 and PV" }; //
251252 Configurable<bool > nPileUp{" nPileUp" , true , " Rejects events with pileup in the same bunch crossing" };
252253 Configurable<int > nINELSelectionMode{" nINELSelectionMode" , 2 , " INEL event selection: 1 no sel, 2 INEL>0, 3 INEL>1" };
254+ Configurable<bool > nGoodITS{" nGoodITS" , true , " Numbers of inactive chips on all ITS layers are below maximum allowed values" };
253255 Configurable<int > v0SelectionMode{" v0SelectionMode" , 3 , " V0 Selection base on TPC: 1, TOF:2 ,Both:3" };
254256 Configurable<int > momentumMode{" momentumMode" , 2 , " 1: TPC inner param, 2: Total momentum p" };
255257 Configurable<uint8_t > v0TypeSelection{" v0TypeSelection" , 1 , " select on a certain V0 type (leave negative if no selection desired)" };
@@ -281,10 +283,10 @@ struct DedxPidAnalysis {
281283 TrackSelection selectedTracks;
282284 selectedTracks.SetPtRange (0 .1f , 1e10f);
283285 selectedTracks.SetEtaRange (etaMin, etaMax);
284- selectedTracks.SetRequireITSRefit (true );
285- selectedTracks.SetRequireTPCRefit (true );
286+ // selectedTracks.SetRequireITSRefit(true);
287+ // selectedTracks.SetRequireTPCRefit(true);
286288 selectedTracks.SetMinNCrossedRowsTPC (static_cast <int >(minNCrossedRowsTPC.value ));
287- selectedTracks.SetMinNCrossedRowsOverFindableClustersTPC (minNCrossedRowsOverFindableClustersTPC);
289+ // selectedTracks.SetMinNCrossedRowsOverFindableClustersTPC(minNCrossedRowsOverFindableClustersTPC);
288290 selectedTracks.SetMaxChi2PerClusterTPC (maxChi2TPC);
289291 selectedTracks.SetRequireHitsInITSLayers (1 , {0 , 1 , 2 });
290292 selectedTracks.SetMaxChi2PerClusterITS (maxChi2ITS);
@@ -310,6 +312,11 @@ struct DedxPidAnalysis {
310312 } else {
311313 LOGF (info, " GoodZvtxFT0vsPV cut disabled" );
312314 }
315+ if (nGoodITS) {
316+ LOGF (info, " Applying GoodITSLayersAll cut" );
317+ } else {
318+ LOGF (info, " GoodITSLayersAll cut disabled" );
319+ }
313320 if (nINELSelectionMode == NoSelINEL) {
314321 LOGF (info, " Applying just INEL" );
315322 label = " INEL" ;
@@ -760,7 +767,7 @@ struct DedxPidAnalysis {
760767 HistType::kTH2F , {{ptAxis}, {dcaAxis}});
761768
762769 // Event Counter
763- registryDeDx.add (" evsel" , " events selected" , HistType::kTH1F , {{6 , 0.5 , 6 .5 , " " }});
770+ registryDeDx.add (" evsel" , " events selected" , HistType::kTH1F , {{7 , 0.5 , 7 .5 , " " }});
764771 auto hstat = registryDeDx.get <TH1 >(HIST (" evsel" ));
765772 auto * x = hstat->GetXaxis ();
766773 x->SetBinLabel (AllEv, " AllEv" );
@@ -769,6 +776,7 @@ struct DedxPidAnalysis {
769776 x->SetBinLabel (NoSameBunchPileup, " NoSameBunchPileup" );
770777 x->SetBinLabel (GoodZvtxFT0vsPV, " GoodZvtxFT0vsPV" );
771778 x->SetBinLabel (INELgt, label);
779+ x->SetBinLabel (GoodITS, " GoodITSLayersAll" );
772780
773781 // Track Prim Counter
774782 registryDeDx.add (" trackselAll" , " track selected all particles" , HistType::kTH1F , {{5 , 0.5 , 5.5 , " " }});
@@ -1438,6 +1446,12 @@ struct DedxPidAnalysis {
14381446 registryDeDx.fill (HIST (" evsel" ), EvCutLabel::GoodZvtxFT0vsPV);
14391447 }
14401448
1449+ if (nGoodITS) {
1450+ if (!collision.selection_bit (o2::aod::evsel::kIsGoodITSLayersAll ))
1451+ return ;
1452+ registryDeDx.fill (HIST (" evsel" ), EvCutLabel::GoodITS);
1453+ }
1454+
14411455 if (nINELSelectionMode == NoSelINEL) {
14421456 registryDeDx.fill (HIST (" evsel" ), EvCutLabel::INELgt);
14431457 } else if (nINELSelectionMode == SelINELgt0) {
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